C8051F510-IMR Silicon Labs, C8051F510-IMR Datasheet - Page 154
C8051F510-IMR
Manufacturer Part Number
C8051F510-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 32 kB 4 kB CAN2.0 LIN 2.1 SPI
Manufacturer
Silicon Labs
Datasheet
1.C8051F510-IMR.pdf
(312 pages)
Specifications of C8051F510-IMR
Rohs
yes
Core
8051
Data Bus Width
8 bit
Processor Series
C8051
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C8051F50x/F51x
18.4.2. Non-multiplexed Configuration
In Non-multiplexed mode, the Data Bus and the Address Bus pins are not shared. An example of a Non-
multiplexed Configuration is shown in Figure 18.2. See Section “18.6.1. Non-Multiplexed Mode” on
page 158 for more information about Non-multiplexed operation.
154
E
M
I
F
A[15:0]
D[7:0]
/WR
/RD
Figure 18.2. Non-multiplexed Configuration Example
ADDRESS BUS
DATA BUS
Rev. 1.2
(Optional)
V
DD
8
A[15:0]
I/O[7:0]
CE
WE
OE
64 K X 8
SRAM
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