BR93L86-W Rohm Semiconductor, BR93L86-W Datasheet - Page 18

IC EEPROM 16KBIT 2MHZ 8DIP

BR93L86-W

Manufacturer Part Number
BR93L86-W
Description
IC EEPROM 16KBIT 2MHZ 8DIP
Manufacturer
Rohm Semiconductor
Datasheet

Specifications of BR93L86-W

Format - Memory
EEPROMs - Serial
Memory Type
EEPROM
Memory Size
16K (1K x 16)
Speed
2MHz
Interface
Microwire, 3-Wire Serial
Voltage - Supply
1.8 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Package / Case
8-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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6) When to directly connect DI and DO
This IC has independent input terminal DI and output terminal DO, and separate signals are handled on timing chart,
meanwhile, by inserting a resistance R between these DI and DO terminals, it is possible to carry out control by 1 control line.
○Data collision of microcontroller DI/O output and DO output and feedback of DO output to DI input.
Drive from the microcontroller DI/O output to DI input on I/O timing, and signal output from DO output occur at the same
time in the following points.
(1) 1 clock cycle to take in A0 address data at read command
(2) Timing of CS = “H” after write command. DO terminal in READY / BUSY function output.
Feedback input at timing of these (1) and (2) does not cause disorder in basic operations, if resistance R is inserted.
Note) As for the case (2), attention must be paid to the following.
Dummy bit “0” is output to DO terminal.
→When address data A0 = “1” input, through current route occurs.
When the next start bit input is recognized, “HIGH-Z” gets in.
→Especially, at command input after write, when CS input is started with microcontroller DI/O output “L”,
READY output “H” is output from DO terminal, and through current route occurs.
When status READY is output, DO and DI are shared, DI=”H” and the microcontroller DI/O=”High-Z” or the microcontroller DI/O=”H”,if SK clock is
input, DO output is input to DI and is recognized as a start bit, and malfunction may occur. As a method to avoid malfunction, at status READY
output, set SK=“L”, or start CS within 4 clocks after “H” of READY signal is output.
EEPROM CS input
EEPROM SK input
EEPROM DI input
EEPROM DO output
Microcontroller DI/O port
EEPROM CS input
EEPROM SK input
EEPROM DI input
EEPROM DO output
Microcontroller DI/O port
Fig.80 DI, DO control line common connection
Fig.81 Collision timing at read data output at DI, DO direct connection
Fig.82 Collision timing at DI, DO direct connection
Fig.83 Start bit input timing at DI, DO direct connection
CS
SK
DI
DO
Microcontroller
Microcontroller output
Microcontroller output
Write command
Write command
Write command
Write command
Write command
“H”
DI/O PORT
High-Z
READY
A1
A1
R
A0
A0
0
Microcontroller input
Start bit
18/40
D15 D14 D13
DI
DO
BUSY
Microcontroller input
EEPROM
BUSY
Collision of DI input and DO output
~ ~
~ ~
~ ~
~ ~
~ ~
High-Z
READY
READY
High-Z
Because DI=”H”, set
SK=”L” at CS rise.
Microcontroller output
~ ~
~ ~
~ ~
~ ~
~ ~
READY
Collision of DI input and DO output
High-Z
Technical Note
2011.02 - Rev.F

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