C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 5
C8051F987-GMR
Manufacturer Part Number
C8051F987-GMR
Description
8-bit Microcontrollers - MCU 8kB 512B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F987-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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20. SmaRTClock (Real Time Clock) .......................................................................... 195
21. Port Input/Output.................................................................................................. 213
22. SMBus ................................................................................................................... 233
19.2.Low Power Internal Oscillator......................................................................... 187
19.3.External Oscillator Drive Circuit...................................................................... 187
19.4.Special Function Registers for Selecting and Configuring the System Clock 191
20.1.SmaRTClock Interface ................................................................................... 196
20.2.SmaRTClock Clocking Sources ..................................................................... 201
20.3.SmaRTClock Timer and Alarm Function ........................................................ 206
21.1.Port I/O Modes of Operation........................................................................... 214
21.2.Assigning Port I/O Pins to Analog and Digital Functions................................ 215
21.3.Priority Crossbar Decoder .............................................................................. 217
21.4.Port Match ...................................................................................................... 223
21.5.Special Function Registers for Accessing and Configuring Port I/O .............. 225
22.1.Supporting Documents ................................................................................... 234
22.2.SMBus Configuration...................................................................................... 234
19.3.1.External Crystal Mode............................................................................ 187
19.3.2.External RC Mode.................................................................................. 189
19.3.3.External Capacitor Mode........................................................................ 190
19.3.4.External CMOS Clock Mode .................................................................. 190
20.1.1.SmaRTClock Lock and Key Functions................................................... 196
20.1.2.Using RTC0ADR and RTC0DAT to Access SmaRTClock
20.1.3.RTC0ADR Short Strobe Feature............................................................ 197
20.1.4.SmaRTClock Interface Autoread Feature .............................................. 197
20.1.5.RTC0ADR Autoincrement Feature......................................................... 198
20.2.1.Using the SmaRTClock Oscillator with a Crystal or
20.2.2.Using the SmaRTClock Oscillator in Self-Oscillate Mode...................... 202
20.2.3.Using the Low Frequency Oscillator (LFO) ............................................ 202
20.2.4.Programmable Load Capacitance.......................................................... 203
20.2.5.Automatic Gain Control (Crystal Mode Only) and SmaRTClock
20.2.6.Missing SmaRTClock Detector .............................................................. 206
20.2.7.SmaRTClock Oscillator Crystal Valid Detector ...................................... 206
20.3.1.Setting and Reading the SmaRTClock Timer Value .............................. 206
20.3.2.Setting a SmaRTClock Alarm ................................................................ 207
20.3.3.Software Considerations for using the SmaRTClock Timer and Alarm . 208
21.1.1.Port Pins Configured for Analog I/O....................................................... 214
21.1.2.Port Pins Configured For Digital I/O....................................................... 214
21.1.3.Interfacing Port I/O to 5 V Logic ............................................................. 215
21.1.4.Increasing Port I/O Drive Strength ......................................................... 215
21.2.1.Assigning Port I/O Pins to Analog Functions ......................................... 215
21.2.2.Assigning Port I/O Pins to Digital Functions........................................... 216
21.2.3.Assigning Port I/O Pins to External Digital Event Capture Functions .... 216
Internal Registers ................................................................................... 197
External CMOS Clock ............................................................................ 201
Bias Doubling ......................................................................................... 204
Rev. 1.1
C8051F99x-C8051F98x
5
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