C8051F987-GMR Silicon Labs, C8051F987-GMR Datasheet - Page 192
C8051F987-GMR
Manufacturer Part Number
C8051F987-GMR
Description
8-bit Microcontrollers - MCU 8kB 512B RAM
Manufacturer
Silicon Labs
Datasheet
1.C8051F986-GUR.pdf
(322 pages)
Specifications of C8051F987-GMR
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
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C8051F99x-C8051F98x
SFR Definition 19.2. OSCICN: Internal Oscillator Control
SFR Page = 0x0; SFR Address = 0xB2
192
Notes:
Name
Reset
Type
5:0
Bit
Bit
7
6
1. Read-modify-write operations such as ORL and ANL must be used to set or clear the enable bit of this
2. OSCBIAS (REG0CN.4) must be set to 1 before enabling the precision internal oscillator.
register.
Reserved Must perform read-modify-write.
IOSCEN
IOSCEN
IFRDY
Name
R/W
7
0
Internal Oscillator Enable.
0: Internal oscillator disabled.
1: Internal oscillator enabled.
Internal Oscillator Frequency Ready Flag.
0: Internal oscillator is not running at its programmed frequency.
1: Internal oscillator is running at its programmed frequency.
IFRDY
R
6
0
Varies
R/W
5
Varies
R/W
Rev. 1.1
4
Function
Varies
R/W
3
Reserved
[5:0]
Varies
R/W
2
Varies
R/W
1
Varies
R/W
0
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