5AGXMA1D4F27C4N Altera Corporation, 5AGXMA1D4F27C4N Datasheet - Page 6
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5AGXMA1D4F27C4N
Manufacturer Part Number
5AGXMA1D4F27C4N
Description
FPGA - Field Programmable Gate Array FPGA - Arria V GX 2830 LABS 336 IOs
Manufacturer
Altera Corporation
Series
Arria V GXr
Datasheet
1.5AGXFB3H4F40C5N.pdf
(33 pages)
Specifications of 5AGXMA1D4F27C4N
Rohs
yes
Number Of Logic Blocks
2830
Number Of I/os
336
Maximum Operating Frequency
800 MHz
Operating Supply Voltage
1.2 V to 1.8 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Package / Case
FBGA-672
Distributed Ram
8463 kbit
Minimum Operating Temperature
0 C
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
5AGXMA1D4F27C4N
Manufacturer:
FSC
Quantity:
1 001
Altera Corporation
6
Maximum Resources
Package Plan
2
3
4
5
Table 4: Maximum Resource Counts for Arria V GX Devices Preliminary
Table 5: Package Plan for Arria V GX Devices Preliminary
Logic Elements (LE)
(K)
ALM
Register
Memory
(Kb)
Variable-precision
DSP Block
18 x 18 Multiplier
PLL
6 Gbps Transceiver
GPIO
LVDS
PCIe Hard IP Block
Hard Memory
Controller
The number of PLLs includes general-purpose fractional PLLs and transceiver fractional PLLs.
The number of GPIOs does not include transceiver I/Os. In the Quartus II software, the number of user I/Os
includes transceiver I/Os.
For the number of LVDS channels in each package, refer to the
in Arria V Devices
In the F896 package, the PCIe hard IP block on the right side of the Arria V GX A5, A7, B1, and B3 devices
support x1 for Gen1 and Gen2 data rates.
Member
Code
Arria V Device Overview
A1
A3
A5
2
Resource
3
4
Transmitter
Receiver
MLAB
M10K
GPIO
336
336
336
chapter.
(27 mm)
F672
113,208
28,302
8,000
463
240
480
416
A1
75
10
68
80
9
1
2
XCVR
9
9
9
235,600
58,900
10,510
156
961
396
792
416
A3
10
68
80
9
1
2
GPIO
416
416
384
(31 mm)
286,792
71,698
11,800
F896
1,173
1,200
190
600
544
120
136
A5
12
24
2
4
5
XCVR
18
9
9
366,720
91,680
13,660
1,448
1,600
242
800
544
120
136
A7
12
24
Member Code
2
4
High-Speed Differential I/O Interfaces and DPA
GPIO
544
—
—
113,208
452,832
15,100
1,852
1,840
300
920
704
160
176
B1
12
24
(35 mm)
2
4
F1152
XCVR
136,880
547,520
24
17,260
—
—
2,098
1,045
2,090
362
704
160
176
B3
12
24
2
4
Arria V Device Overview
158,491
633,964
20,540
GPIO
2,532
1,092
2,184
—
—
—
420
704
160
176
B5
16
36
2
4
(40 mm)
F1517
190,240
760,960
24,140
2,906
1,156
2,312
XCVR
504
704
160
176
B7
16
36
—
—
—
2
4
2013.01.11
AV-51001