C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 61
C8051F966-A-GQ
Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F966-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
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Table 4.4. Digital Supply Current with DC-DC Converter Disabled (Continued)
–40 to +85 °C, 25 MHz system clock unless otherwise specified.
Digital Supply Current—Sleep Mode (LCD Enabled, RTC enabled)
Digital Supply Current
(Sleep Mode, SmaRTClock
running, internal LFO, LCD
Contrast Mode 1, charge
pump disabled, 60 Hz
refresh rate, driving 32 seg-
ment pins w/ no load)
Digital Supply Current
(Sleep Mode, SmaRTClock
running, 32.768 kHz Crys-
tal, LCD Contrast Mode 1,
charge pump disabled,
60 Hz refresh rate, driving
32 segment pins w/ no load)
Digital Supply Current
(Sleep Mode, SmaRTClock
running, internal LFO, LCD
Contrast Mode 3 (2.7 V),
charge pump enabled,
60 Hz refresh rate, driving
32 segment pins w/ no load)
Notes:
1. Active Current measure using typical code loop - Digital Supply Current depends upon the particular code
2. Includes oscillator and regulator supply current.
3. Based on device characterization data; Not production tested.
4. Measured with one-shot enabled.
5. Low-Power Idle mode current measured with CLKMODE = 0x04, PCON = 0x01, and PCLKEN = 0x0F.
6. Using SmaRTClock osillator with external 32.768 kHz CMOS clock. Does not include crystal bias current.
7. Low-Power Idle mode current measured with CLKMODE = 0x04, PCON = 0x01, and PCLKEN = 0x00.
being executed. Digital Supply Current depends on the particular code being executed. The values in this
table are obtained with the CPU executing a mix of instructions in two loops: djnz R1, $, followed by a loop
that accesses an SFR, and moves data around using the CPU (between accumulator and b-register). The
supply current will vary slightly based on the physical location of this code in flash. As described in the Flash
Memory chapter, it is best to align the jump addresses with a flash word address (byte location /4), to
minimize flash accesses and power consumption.
Parameter
1.8 V, T = 25
3.0 V, T = 25
3.6 V, T = 25
1.8 V, T = 25
3.0 V, T = 25
3.6 V, T = 25
1.8 V, T = 25
3.0 V, T = 25
3.6 V, T = 25
1.8 V, T = 25
3.0 V, T = 25
3.6 V, T = 25
1.8 V, T = 25
1.8 V, T = 25
1.8 V, T = 25
1.8 V, T = 25
3.0 V, T = 25
3.6 V, T = 25
1.8 V, T = 25
3.0 V, T = 25
3.6 V, T = 25
1.8 V, T = 25
Conditions
Rev. 0.5
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
°
C, 2-Mux LCD
C, 2-Mux LCD
C, 2-Mux LCD
C, 4-Mux LCD
C, 4-Mux LCD
C, 4-Mux LCD
C, 2-Mux LCD
C, 2-Mux LCD
C, 2-Mux LCD
C, 4-Mux LCD
C, 4-Mux LCD
C, 4-Mux LCD
C, 2-Mux LCD
C, 3-Mux LCD
C, 4-Mux LCD
C, static LCD
C, static LCD
C, static LCD
C, static LCD
C, static LCD
C, static LCD
C, static LCD
Min
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
C8051F96x
Typ
0.4
0.6
0.8
0.7
1.0
1.2
0.7
1.1
1.2
0.8
1.1
1.4
1.1
1.5
1.8
1.2
1.6
1.9
1.2
1.6
1.8
2.0
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
µA
µA
µA
µA
µA
µA
µA
61
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