C8051F966-A-GQ Silicon Labs, C8051F966-A-GQ Datasheet - Page 298
C8051F966-A-GQ
Manufacturer Part Number
C8051F966-A-GQ
Description
8-bit Microcontrollers - MCU 32KB DC-DC LCD AES
Manufacturer
Silicon Labs
Datasheet
1.C8051F960-A-GQ.pdf
(492 pages)
Specifications of C8051F966-A-GQ
Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
Maximum Clock Frequency
24.5 MHz
Program Memory Size
32 KB
Data Ram Size
8 KB
On-chip Adc
Yes
Operating Supply Voltage
1.8 V to 3.8 V
Operating Temperature Range
- 40 C to + 85 C
Package / Case
QFP-80
Mounting Style
SMD/SMT
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C8051F966-A-GQ
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Silicon Laboratories Inc
Quantity:
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C8051F96x
SFR Definition 24.1. RTC0KEY: SmaRTClock Lock and Key
SFR Page = 0x0; SFR Address = 0xAE
SFR Definition 24.2. RTC0ADR: SmaRTClock Address
SFR Page = 0x0; SFR Address = 0xAC
298
Note: The ADDR bits increment after each indirect read/write operation that targets a CAPTUREn or ALARMnBn
Name
Reset
Name
Reset
Type
Type
Bit
Bit
7:0
Bit
Bit
4:0
7
6
5
internal SmaRTClock register.
ADDR[4:0] SmaRTClock Indirect Register Address.
Reserved Read = 0; Write = don’t care.
AUTORD SmaRTClock Interface Autoread Enable.
RTC0ST
Unused
Name
Name
R
7
0
7
0
SmaRTClock Interface Status.
Provides lock status when read.
Enables/disables Autoread.
0: Autoread Disabled.
1: Autoread Enabled.
Read = 0b; Write = Don’t Care.
Sets the currently selected SmaRTClock register.
See Table 24.1 for a listing of all SmaRTClock indirect registers.
AUTORD
R/W
6
0
6
0
Read:
0x02: SmaRTClock Interface is unlocked.
Write:
Writes to RTC0KEY have no effect.
R
5
0
5
0
Rev. 0.5
4
0
4
0
RTC0ST[7:0]
R/W
Function
Function
3
0
3
0
ADDR[4:0]
R/W
2
0
2
0
1
0
1
0
0
0
0
0
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