AS4C8M16S-7BCNTR Alliance Memory, AS4C8M16S-7BCNTR Datasheet - Page 44
![no-image](/images/no-image-200.jpg)
AS4C8M16S-7BCNTR
Manufacturer Part Number
AS4C8M16S-7BCNTR
Description
DRAM 128Mb, 3.3V, 143Mhz 8M x 16 SDRAM
Manufacturer
Alliance Memory
Datasheet
1.AS4C8M16S-7BCN.pdf
(53 pages)
Specifications of AS4C8M16S-7BCNTR
Rohs
yes
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Figure 36.1. Full Page Read Cycle
FEBRUARY 2011
CKE
WE#
BA0,1
DQM
CLK
CS#
RAS#
CAS#
A10
A0-A9,
A11
DQ
Hi-Z
Activate
Cammand
Bank A
High
RAx
RAx
T0
T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22
Read
Command
Bank A
CAx
Activate
Cammand
Bank B
RBx
RBx
Ax Ax+1 Ax+2
The burst counter wraps
from the highest order
page address back to zero
during this time interval
Full Page burst operation does not
terminate when the burst length is satisfied;
the burst counter increments and continues
bursting beginning with the starting address
(Burst Length=Full Page, CAS# Latency=2)
Ax-2 Ax-1
Read
Command
Bank B
CBx
Ax
44
Ax+1 Bx
Bx+1 Bx+2 Bx+3 Bx+4 Bx+5 Bx+6
Burst Stop
Command
Precharge
Command
Bank B
Don’t Care
t
RP
AS4C8M16S
Activate
Command
Bank B
RBy
RBy
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