AS4C8M16S-7BCNTR Alliance Memory, AS4C8M16S-7BCNTR Datasheet - Page 12
![no-image](/images/no-image-200.jpg)
AS4C8M16S-7BCNTR
Manufacturer Part Number
AS4C8M16S-7BCNTR
Description
DRAM 128Mb, 3.3V, 143Mhz 8M x 16 SDRAM
Manufacturer
Alliance Memory
Datasheet
1.AS4C8M16S-7BCN.pdf
(53 pages)
Specifications of AS4C8M16S-7BCNTR
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FEBRUARY 2011
*Note: RFU (Reserved for future use) should stay “0” during MRS cycle.
Table 5. Mode Register Bitmap
BA0,1 A11,A10
RFU*
A6
A9
CLK
CKE
CS#
RAS#
CAS#
WE#
A0-A9,
A11
A10
DQM
DQ
0
0
0
0
1
BA0,1
0
1
Write Burst Length
A5
0
0
1
1
0
All other Reserved
RFU*
Hi-Z
Single Bit
Burst
A4
0
1
0
1
1
T0
WBL
A9
CAS# Latency
Reserved
Reserved
Reserved
T1
2 clocks
3 clocks
A8
Test Mode
PrechargeAll
Figure 15. Mode Register Set Cycle
A8
0
1
0
T2
A7
A7
0
0
1
T3
t
Vendor Use Only
Vendor Use Only
RP
A6
Test Mode
CAS# Latency
Normal
T4
Address Key
Mode Register
Set Command
A5
A2
0
0
0
0
1
T5
12
A4
A1
0
0
1
1
1
t
T6
MRD
All other Reserved
A3
BT
A0
0
1
0
1
1
T7
Any
Command
Full Page (Sequential)
A3
A2
0
1
Burst Length
Burst Length
T8
Burst Type
Sequential
Interleave
A1
1
2
4
8
T9
AS4C8M16S
Don’t Care
A0
T10
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