IDT74SSTUBF32866BBFG IDT, Integrated Device Technology Inc, IDT74SSTUBF32866BBFG Datasheet - Page 27
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IDT74SSTUBF32866BBFG
Manufacturer Part Number
IDT74SSTUBF32866BBFG
Description
IC BUFFER 25BIT REG DDR2 96-BGA
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.IDT74SSTUBF32866BBFG.pdf
(30 pages)
Specifications of IDT74SSTUBF32866BBFG
Logic Type
1:1, 1:2 Configurable Registered Buffer
Supply Voltage
1.7 V ~ 1.9 V
Number Of Bits
25, 14
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
96-BGA
Logic Family
SSTU
Logical Function
Registered Buffer
Number Of Elements
1
Number Of Inputs
25
Number Of Outputs
25
High Level Output Current
-8mA
Low Level Output Current
8mA
Propagation Delay Time
3ns
Operating Supply Voltage (typ)
1.8V
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Clock-edge Trigger Type
Posit/Negat-Edge
Polarity
Non-Inverting
Technology
CMOS
Frequency (max)
410(Min)MHz
Mounting
Surface Mount
Pin Count
96
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74SSTUBF32866BBFG
800-1695
800-1695
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
IDT74SSTUBF32866BBFG
Manufacturer:
HBa
Quantity:
826
Company:
Part Number:
IDT74SSTUBF32866BBFG
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Company:
Part Number:
IDT74SSTUBF32866BBFG8
Manufacturer:
IDT, Integrated Device Technology Inc
Quantity:
10 000
Test Circuits and Waveforms (V
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
IDT74SSTUBF32866B
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
Voltage Waveforms: High-to-Low Slew-Rate Adjustment
Voltage Waveforms: Low-to-High Slew-Rate Adjustment
Output
Output
Load Circuit: High-to-Low Slew-Rate Adjustment
Load Circuit: Low-to-High Slew-Rate Adjustment
NOTES:
1. CL includes probe and jig capacitance.
2. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10MHz, Zo = 50Ω , input
slew rate = 1 V/ns ±20% (unless otherwise specified).
dv_f
dv_r
DUT
Out
DUT
Out
C
80%
L
20%
C
= 10 pF
L
= 10 pF
dt_r
dt_f
80%
20%
V
DD
Test Point
R
L
= 50
R
Test Point
L
= 50
DD
V
V
V
V
OH
OL
OH
OL
= 1.8V ± 0.1V)
27
Waveform 1
Waveform 2
Waveform 2
Voltage Waveforms: Open Drain Output Low-to-High
Voltage Waveforms: Open Drain Output High-to-Low
Voltage Waveforms: Open Drain Output Low-to-High
LVCMOS
Timing
Timing
Inputs
Inputs
Output
RESET
Output
Output
Transition Time (with respect to RESET input)
Transition Time (with respect to clock inputs)
Transition Time (with respect to clock inputs)
Input
Load Circuit: Error Output Measurements
t
DUT
PLH
t
HL
V
V
t
HL
COMMERCIAL TEMPERATURE GRADE
ICR
Out
ICR
V
V
CC
0.15V
CC
0.15V
/2
/2
C
L
= 10 pF
V
IDT74SSTUBF32866B
V
ICR
ICR
V
DD
Test Point
R
L
= 1K
V
V
V
7067/13
I(PP)
V
I(PP)
V
0V
V
V
0V
OH
0V
CC
CC
OH
OL