MT46V64M16P-6T IT:A Micron, MT46V64M16P-6T IT:A Datasheet - Page 41
MT46V64M16P-6T IT:A
Manufacturer Part Number
MT46V64M16P-6T IT:A
Description
DRAM Chip DDR SDRAM 1G-Bit 64Mx16 2.5V 66-Pin TSOP Tray
Manufacturer
Micron
Datasheet
1.MT46V64M16P-6TITA.pdf
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WRITE
Figure 17:
PDF: 09005aef80768abb/Source: 09005aef82a95a3a
DDR_x4x8x16_Core2.fm - 1Gb DDR: Rev. J; Core DDR Rev. E 7/11 EN
WRITE Command
Note:
The WRITE command is used to initiate a burst write access to an active row as shown in
Figure 17. The value on the BA0, BA1 inputs selects the bank, and the address provided
on inputs A[i:0]
and configuration, see Table 2 on page 2) selects the starting column location.
BA0, BA1
Address
RAS#
CAS#
WE#
CK#
CKE
A10
EN AP = enable auto precharge; and DIS AP = disable auto precharge.
CS#
CK
HIGH
DIS AP
EN AP
Bank
Col
(
Don’t Care
where Ai is the most significant column address bit for a given density
41
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1Gb: x4, x8, x16 DDR SDRAM
©2000 Micron Technology, Inc. All rights reserved.
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