PIC18F2420-I/SOC01 Microchip, PIC18F2420-I/SOC01 Datasheet - Page 27
PIC18F2420-I/SOC01
Manufacturer Part Number
PIC18F2420-I/SOC01
Description
28 pin, 16 kb flash, 3804 ram, 25 i/o...
Manufacturer
Microchip
Datasheet
1.PIC18F2420-ISOC01.pdf
(412 pages)
- Current page: 27 of 412
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2.4
For timing insensitive applications, the “RC” and
“RCIO” device options offer additional cost savings.
The actual oscillator frequency is a function of several
factors:
• supply voltage
• values of the external resistor (R
• operating temperature
Given the same device, operating voltage and tempera-
ture and component values, there will also be unit-to-unit
frequency variations. These are due to factors such as:
• normal manufacturing variation
• difference in lead frame capacitance between
• variations within the tolerance of limits of R
In the RC Oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 2-5 shows how the R/C combination is
connected.
FIGURE 2-5:
The RCIO Oscillator mode (Figure 2-6) functions like
the RC mode, except that the OSC2 pin becomes an
additional general purpose I/O pin. The I/O pin
becomes bit 6 of PORTA (RA6).
FIGURE 2-6:
© 2008 Microchip Technology Inc.
C
V
C
V
Recommended values: 3 kΩ ≤ R
Recommended values: 3 kΩ ≤ R
capacitor (C
package types (especially for low C
and C
R
R
EXT
SS
EXT
SS
EXT
EXT
V
V
DD
DD
EXT
RC Oscillator
RA6
EXT
F
OSC
)
/4
OSC1
RC OSCILLATOR MODE
RCIO OSCILLATOR MODE
OSC1
OSC2/CLKO
I/O (OSC2)
C
C
EXT
EXT
> 20 pF
> 20 pF
EXT
EXT
EXT
≤ 100 kΩ
≤ 100 kΩ
EXT
PIC18FXXXX
PIC18FXXXX
) and
values)
Internal
Internal
Clock
Clock
EXT
PIC18F2420/2520/4420/4520
2.5
A Phase Locked Loop (PLL) circuit is provided as an
option for users who wish to use a lower frequency
oscillator circuit or to clock the device up to its highest
rated frequency from a crystal oscillator. This may be
useful for customers who are concerned with EMI due
to high-frequency crystals or users who require higher
clock speeds from an internal oscillator.
2.5.1
The HSPLL mode makes use of the HS Oscillator
mode for frequencies up to 10 MHz. A PLL then multi-
plies the oscillator output frequency by 4 to produce an
internal clock frequency up to 40 MHz. The PLLEN bit
is not available in this oscillator mode.
The PLL is only available to the crystal oscillator when
the FOSC<3:0> Configuration bits are programmed for
HSPLL mode (= 0110).
FIGURE 2-7:
2.5.2
The PLL is also available to the internal oscillator block
in selected oscillator modes. In this configuration, the
PLL is enabled in software and generates a clock out-
put of up to 32 MHz. The operation of INTOSC with the
PLL is described in Section 2.6.4 “PLL in INTOSC
Modes”.
OSC2
OSC1
PLL Frequency Multiplier
(from Configuration Register 1H)
HS Oscillator Enable
HS Mode
HSPLL OSCILLATOR MODE
PLL AND INTOSC
Crystal
Osc
PLL Enable
F
F
÷4
PLL BLOCK DIAGRAM (HS
MODE)
IN
OUT
Comparator
Loop
Filter
Phase
VCO
DS39631E-page 25
SYSCLK
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