DM9010_06 DAVICOM [Davicom Semiconductor, Inc.], DM9010_06 Datasheet - Page 34
DM9010_06
Manufacturer Part Number
DM9010_06
Description
10/100 Mbps Single Chip Ethernet Controller with General Processor Interface
Manufacturer
DAVICOM [Davicom Semiconductor, Inc.]
Datasheet
1.DM9010_06.pdf
(62 pages)
- Current page: 34 of 62
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Preliminary
Version: DM9010-17--DS-P04
Jan. 18, 2006
1.6
1.5
1.4
1.3
1.2
1.1
1.0
Auto-negotiatio
Auto-negotiatio
MF preamble
Remote fault
Jabber detect
suppression
Link status
Complete
capability
Extended
ability
n
n
0, RO/LH Remote Fault
0, RO/LH Jabber Detect
0,RO/LL Link Status
1,RO/P
1,RO/P
1,RO
0,RO
Single Chip Ethernet Controller with General Processor Interface
MII Frame Preamble Suppression
1 = PHY will accept management frames with preamble
suppressed
0 = PHY will not accept management frames with preamble
suppressed
Auto-negotiation Complete
1 = Auto-negotiation process completed
0 = Auto-negotiation process not completed
1 = Remote fault condition detected (cleared on read or by a
chip reset). Fault criteria and detection method is DM9010
implementation specific. This bit will set after the RF bit in
the ANLPAR (bit 13, register address 05) is set
0 = No remote fault condition detected
Auto Configuration Ability
1 = DM9010 is able to perform auto-negotiation
0 = DM9010 is not able to perform auto-negotiation
1 = Valid link is established (for either 10Mbps or 100Mbps
operation)
0 = Link is not established
The link status bit is implemented with a latching function, so
that the occurrence of a link failure condition causes the link
status bit to be cleared and remain cleared until it is read via
the management interface
1 = Jabber condition detected
0 = No jabber
This bit is implemented with a latching function. Jabber
conditions will set this bit unless it is cleared by a read to this
register through a management interface or a DM9010 reset.
This bit works only in 10Mbps mode
Extended Capability
1 = Extended register capable
0 = Basic register capable only
DM9010
34
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