932S208YFLNT IDT [Integrated Device Technology], 932S208YFLNT Datasheet
932S208YFLNT
Related parts for 932S208YFLNT
932S208YFLNT Summary of contents
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Programmable Timing Control Hub TM Gen P4 Processor Recommended Application: CK409B clock, Intel Yellow Cover part, Server Applications Output Features: • 0.7V current-mode differential CPU pairs • 0.7V current-mode differential SRC pair • PCI ...
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ICS932S208 Programmable Timing Control Hub Pin Description PIN # PIN NAME 1 REF0 2 REF1 3 VDDREF GND 7 PCICLK_F0 8 PCICLK_F1 9 PCICLK_F2 10 VDDPCI 11 GND 12 PCICLK0 13 PCICLK1 14 PCICLK2 15 ...
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ICS932S208 Programmable Timing Control Hub Pin Description (continued) PIN # PIN NAME 29 3V66_4/VCH 30 SDATA 31 48MHz_USB 32 48MHz_DOT 33 GND 34 VDD48 35 Vtt_PWRGD# 36 VDD 37 SRCCLKC 38 SRCCLKT 39 GND 40 CPUCLKC0 41 CPUCLKT0 42 VDDCPU ...
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ICS932S208 Programmable Timing Control Hub General Description ICS932S208 follows Intel CK409B Yellow Cover specification. This clock synthesizer provides a single chip solution for next generation P4 Intel processors and Intel chipsets. ICS932S208 is driven with a 14.318MHz crystal. It generates ...
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ICS932S208 Programmable Timing Control Hub Absolute Maximum Ratings Symbol Parameter VDD_A 3.3V Core Supply Voltage VDD_In 3.3V Logic Input Supply Voltage Ts Storage Temperature Tambient Ambient Operating Temp Tcase Case Temperature Input ESD protection human body model ESD prot Electrical ...
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ICS932S208 Programmable Timing Control Hub Electrical Characteristics - CPU & SRC 0.7V Current Mode Differential Pair 70° 3.3 V +/-5 PARAMETER SYMBOL Current Source Output Zo Impedance Output High Voltage ...
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ICS932S208 Programmable Timing Control Hub Electrical Characteristics - 3V66 Mode: 3V66 [4: 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy ppm T Clock period period V Output High Voltage V ...
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ICS932S208 Programmable Timing Control Hub Electrical Characteristics - 48MHz DOT Clock 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy ppm T Clock period period V Output High Voltage OH Output Low ...
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ICS932S208 Programmable Timing Control Hub Electrical Characteristics - VCH, 48MHz, USB 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy Clock period Output High Voltage Output Low Voltage Output High Current Output ...
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ICS932S208 Programmable Timing Control Hub Electrical Characteristics - REF-14.318MHz 70° 3.3 V +/-5 PARAMETER SYMBOL Long Accuracy Clock period Output High Voltage Output Low Voltage Output High Current Output Low Current ...
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ICS932S208 Programmable Timing Control Hub 2 General I C serial interface information for the ICS932S208 How to Write: • Controller (host) sends a start bit. • Controller (host) sends the write address D2 • ICS clock will acknowledge • Controller ...
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ICS932S208 Programmable Timing Control Hub Table: Read-Back Register Byte 0 Pin # - Bit 7 RESERVED - RESERVED Bit 6 - RESERVED Bit 5 Bit 4 - RESERVED Bit 3 - RESERVED - RESERVED Bit 2 - ...
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ICS932S208 Programmable Timing Control Hub Table: Output Control Register Byte 3 Pin # 7,8,9,12,13,14,15, PCI_Stop# Bit 7 18,19,20,37,38, Bit Bit 5 Bit Bit 3 Bit 2 14 Bit ...
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ICS932S208 Programmable Timing Control Hub Table: Output Control and Fix Frequency Register Byte 6 Pin # 1,2,7,8,9,12,13,14, 15,18,19,20,22,23,2 Bit 7 Test Clock Mode 6,27,29,31,32,37,38 ,40,41,43,44,46,47 Bit 6 - RESERVED Bit 5 40,41,43,44,46,47 FS Testmode 37,38 Bit 4 ...
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ICS932S208 Programmable Timing Control Hub PCI Stop Functionality The PCI_STOP# signal active low input controlling PCI and SRC outputs. If PCIF (2:0) and SRC clocks can be set to be free-running through I2C programming. Outputs set to ...
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ICS932S208 Programmable Timing Control Hub PD#, Power Down PD asynchronous active low input used to shut off all clocks cleanly prior to clock power. When PD# is asserted low all clocks will be driven low before turning off ...
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ICS932S208 Programmable Timing Control Hub PD# De-assertion The time from the de-assertion of PD# or until power supply ramps to get stable clocks will be less than 1.8ms. If the drive mode control bit for PD# tristate is programmed to ...
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ICS932S208 Programmable Timing Control Hub Differential Clock Tristate To minimize power consumption, CPU[2:0] clock outputs are individually configurable through SMBus to be driven or tristated during PwrDwn# and CPU_Stop# mode and the SRC clock is configurable to be driven or ...
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... N E1 INDEX INDEX AREA AREA Ordering Information 932S208yFLNT Example: XXXX Designation for tape and reel packaging Annealed Lead Free Package Type Revision Designator (will not correlate with datasheet revision) Device Type TM IDT Programmable Timing Control Hub TM ...
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ICS932S208 Programmable Timing Control Hub N E1 INDEX INDEX AREA AREA Ordering Information 932S208yGLNT Example: XXXX Designation for tape and reel packaging Annealed Lead Free Package Type Revision ...
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ICS932S208 Programmable Timing Control Hub Revision History Rev. Issue Date Description F 12/2/2008 Removed ICS prefix from ordering information G 1/26/2010 Updated document template TM TM for Next Gen P4 TM Processor Innovate with IDT and accelerate your future networks. ...