LS7212 LSI Computer Systems, LS7212 Datasheet - Page 5

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LS7212

Manufacturer Part Number
LS7212
Description
PROGRAMMABLE DIGITAL DELAY TIMER
Manufacturer
LSI Computer Systems
Datasheet

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Part Number:
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Note 1. TRIG input is clocked in by the negative edge of external clock.
Note 2. Inputs A, B and WB0 - WB7 are sampled only at a TRIG input transition and ignored at all other times.
Note 3. OUT is switched by the positive edge of the external clock.
A. Turn-on delay in DO and DD modes; Pulse-width in OS mode.
B. Turn-off delay in DR and DD modes.
C. Pulse-width extended by re-trigger in OS mode. No effect in DO and DD modes because TRIG switches back low
D. Turn-off delay in DR mode.
E. Turn-on delay in DO and DD modes; pulse-width in OS mode.
F. No effect in DO, DR and DD modes because of TRIG’s switching back to opposite levels.
G. Time-outs aborted and OUT force high by RESET.
H. After the removal of RESET, OUT switches to the inverse polarity of TRIG immediately (DR) or after the timeout
TRIG
Clock
WB0-WB7
A,B
OUT
before turn-on delay has timed out.
(DO,DD). No effect in OS.
OUT(DR)
OUT(OS)
R E S E T
OUT(DO)
OUT(DD)
TRIG
t
0
t
3
t
2
FIGURE 4. MODE ILLUSTRATION WITH TRIG, OUT AND RESET
A = 0, B = 1, Delayed Operate
t
A
1
B
Programmed Delay
FIGURE 3. INPUT/OUTPUT TIMING
C
D
E
F
t
4
t
1
G
Immediate Release
H
t
4

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