MT46V64M16P-6TIT:A Micron Semiconductor Products, MT46V64M16P-6TIT:A Datasheet
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MT46V64M16P-6TIT:A
Manufacturer Part Number
MT46V64M16P-6TIT:A
Description
Manufacturer
Micron Semiconductor Products
Datasheet
1.MT46V64M16P-6TITA.pdf
(82 pages)
Specifications of MT46V64M16P-6TIT:A
Pack_quantity
108
Comm_code
85423239
Lead_time
56
Eccn
EAR99
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT46V64M16P-6TIT:A
Manufacturer:
Micron
Quantity:
1 128
Company:
Part Number:
MT46V64M16P-6TIT:ATR
Manufacturer:
INFINEON
Quantity:
28 320
Table 1:
DDR SDRAM
MT46V256M4 – 64 Meg x 4 x 4 Banks
MT46V128M8 – 32 Meg x 8 x 4 Banks
MT46V64M16 – 16 Meg x 16 x 4 Banks
Features
• V
• Bidirectional data strobe (DQS) transmitted/
• Internal, pipelined double-data-rate (DDR)
• Differential clock inputs (CK and CK#)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; center-
• DLL to align DQ and DQS transitions with CK
• Four internal banks for concurrent operation
• Data mask (DM) for masking write data
• Programmable burst lengths (BL): 2, 4, or 8
• Auto refresh and self refresh modes
• Longer-lead TSOP for improved reliability (OCPL)
• 2.5V I/O (SSTL_2 compatible)
• Concurrent auto precharge option is supported
•
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
1Gb_DDR_x4x8x16_D1.fm - 1Gb DDR: Rev. J, Core DDR: Rev. E 7/11 EN
Speed Grade
V
received with data, that is, source-synchronous data
capture (x16 has two – one per byte)
architecture; two data accesses per clock cycle
aligned with data for WRITEs
(x16 has two – one per byte)
t
RAS lockout supported (
DD
DD
-5B
-6T
-75
= 2.5V ±0.2V, V
= 2.6V ±0.1V, V
Key Timing Parameters
CL = CAS (READ) latency; data-out window is MIN clock rate with 50 percent duty cycle at CL = 2.5
CL = 2
DD
DD
133
133
100
Q = 2.5V ±0.2V
Q = 2.6V ±0.1V (DDR400)
t
RAP =
Clock Rate (MHz)
t
RCD)
CL = 2.5
167
167
133
CL = 3
200
n/a
n/a
1
Notes: 1. Not recommended for new designs.
Options
• Configuration
• Plastic package – OCPL
• Timing – cycle time
• Temperature rating
• Revision
– 256 Meg x 4 (64 Meg x 4 x 4 banks)
– 128 Meg x 8 (32 Meg x 8 x 4 banks)
– 64 Meg x 16 (16 Meg x 16 x 4 banks)
– 66-pin TSOP
– 66-pin TSOP (Pb-free)
– 5.0ns @ CL = 3 (DDR400B)
– 6.0ns @ CL = 2.5 (DDR333B)
– 7.5ns @ CL = 2.5 (DDR266B)
– Commercial (0qC to +70qC)
– Industrial (–40°C to +85°C)
(400-mil width, 0.65mm pin pitch)
(400-mil width, 0.65mm pin pitch)
Micron Technology, Inc., reserves the right to change products or specifications without notice.
2. See Table 3 on page 2 for module
compatibility.
Data-Out
Window
1.6ns
2.0ns
2.5ns
1Gb: x4, x8, x16 DDR SDRAM
Window
±0.70ns
±0.70ns
±0.75ns
Access
©2003 Micron Technology, Inc. All rights reserved.
2
2
DQS–DQ
Marking
Features
0.40ns
0.45ns
0.50ns
Skew
256M4
128M8
64M16
None
-5B
-6T
-75
TG
IT
:A
P
1