EVAL-ADM1063LFEB AD [Analog Devices], EVAL-ADM1063LFEB Datasheet - Page 32

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EVAL-ADM1063LFEB

Manufacturer Part Number
EVAL-ADM1063LFEB
Description
Multisupply Supervisor/Sequencer with ADC and Temperature Monitoring
Manufacturer
AD [Analog Devices]
Datasheet
ADM1063
Error Correction
The ADM1063 provides the option of issuing a packet error
correction (PEC) byte after a write to RAM, a write to EEPROM,
a block write to RAM/EEPROM, or a block read from RAM/
EEPROM. This enables the user to verify that the data received
by or sent from the ADM1063 is correct. The PEC byte is an
optional byte sent after that last data byte has been written to or
read from the ADM1063. The protocol is as follows:
1.
2.
S
1
ADDRESS
SLAVE
The ADM1063 issues a PEC byte to the master. The master
checks the PEC byte and issues another block read if the
PEC byte is incorrect.
A no acknowledge (NACK) is generated after the PEC byte
to signal the end of the read.
2
W A
3
Figure 49. Block Read from EEPROM or RAM
COMMAND 0xFD
(BLOCK READ)
4
A
5
6
S
ADDRESS
SLAVE
7
R A
8
COUNT
BYTE
9
10
A
DATA
DATA
11
32
1
12
A
13
A
14
Rev. 0 | Page 32 of 36
P
Note that the PEC byte is calculated using CRC-8. The frame
check sequence (FCS) conforms to CRC-8 by the polynomial
See the SMBus 1.1 specification for details.
An example of a block read with the optional PEC byte is shown
in Figure 50.
S
1
ADDRESS
SLAVE
C ( x ) = x
2
Figure 50. Block Read from EEPROM or RAM with PEC
W A
8
3
+ x
COMMAND 0xFD
(BLOCK READ)
2
+ x
4
1
+ 1
5
A
S
6
ADDRESS
SLAVE
7
R A
8
COUNT
BYTE
9
DATA
32
10
A
A
DATA
11
1
PEC
13
12
A
14
A
15
P

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