COP87L89RB National Semiconductor, COP87L89RB Datasheet - Page 45

• Manufacturer Part Number: COP87L89RB
• Description: 8-Bit CMOS OTP Microcontrollers with 16k or 32k Memory/ CAN Interface/ 8-Bit A/D/ and USART
• Manufacturer: National Semiconductor

B7
B6
B5
Serial Peripheral Interface
The SPIU Control Register
SRIE
STIE
SESSEN
Bit 7
SRIE
SPI Receive Interrupt Enable
0 — disable receive interrupt
0 — enable receive interrupt
SPI Transmit buffer Interrupt Enable
0 — disable transmit buffer interrupt
0 — enable transmit buffer interrupt
SPI SS Expander (ESS) enable
0 — The detection of the ESS programming mode is disabled, i.e., the value of MOSI at the falling
edge of SS is “don’t care”.
1 — ESS programming mode detection is enabled, i.e., if the condition “MOSI = 0 at the falling edge
of SS” occurs, the SS-Expander is selected and bits [7:0] of the first transmitted byte determine the
state of the N-port (ESS[7:0]). ESS[7:0] will go 1 at the positive edge of SS.
0
Bit 6
STIE
0
TABLE 13. SPI Control (SPICNTL) (0098)
SESSEN
(Continued)
Bit 5
FIGURE 38. SPI Block Diagram
0
Bit 4
SPIMOD[1:0]
0
45
Bit 3
0
Bit 2
SCE
0
SPIEN
Bit 1
0
SLOOP
Bit 0
0
DS100044-40
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