HD6433682 ETC, HD6433682 Datasheet - Page 27
HD6433682
Manufacturer Part Number
HD6433682
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series
Manufacturer
ETC
Datasheet
1.HD6433682.pdf
(504 pages)
Available stocks
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Part Number
Manufacturer
Quantity
Price
Part Number:
HD6433682A45HV
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD6433682C74HV
Manufacturer:
HITACHI/日立
Quantity:
20 000
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Section 1 Overview
Table 1.1
Section 2 CPU
Table 2.1
Table 2.2
Table 2.3
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.6
Table 2.7
Table 2.8
Table 2.9
Table 2.10
Table 2.11
Table 2.12
Table 2.12
Section 3 Exception Handling
Table 3.1
Table 3.2
Section 4 Address Break
Table 4.1
Section 5 Clock Pulse Generators
Table 5.1
Section 6 Power-Down Modes
Table 6.1
Table 6.2
Table 6.3
Section 7 ROM
Table 7.1
Table 7.2
Table 7.3
Table 7.4
Table 7.5
Pin Functions ................................................................................................................7
Operation Notation......................................................................................................22
Data Transfer Instructions...........................................................................................23
Arithmetic Operations Instructions (1) .......................................................................24
Arithmetic Operations Instructions (2) .......................................................................25
Logic Operations Instructions .....................................................................................26
Shift Instructions.........................................................................................................26
Bit Manipulation Instructions (1)................................................................................27
Bit Manipulation Instructions (2)................................................................................28
Branch Instructions .....................................................................................................29
System Control Instructions........................................................................................30
Block Data Transfer Instructions ................................................................................31
Exception Sources and Vector Address ......................................................................48
Interrupt Wait States ...................................................................................................60
Access and Data Bus Used..........................................................................................65
Crystal Resonator Parameters .....................................................................................71
Operating Frequency and Waiting Time.....................................................................77
Transition Mode after SLEEP Instruction Execution and Transition Mode
due to Interrupt............................................................................................................82
Internal State in Each Operating Mode.......................................................................83
Setting Programming Modes ......................................................................................93
Boot Mode Operation .................................................................................................95
System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate
is Possible ...................................................................................................................96
Reprogram Data Computation Table ..........................................................................99
Additional-Program Data Computation Table ............................................................99
Addressing Modes ..................................................................................................33
Absolute Address Access Ranges ...........................................................................34
Effective Address Calculation (1) ...........................................................................36
Effective Address Calculation (2) ...........................................................................37
Tables
Rev. 3.00, 05/03, page xxvii of xxx
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