DS83C530-DS87C530 Maxim Integrated Products, DS83C530-DS87C530 Datasheet
DS83C530-DS87C530
Related parts for DS83C530-DS87C530
DS83C530-DS87C530 Summary of contents
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... EPROM/ROM Microcontrollers with PIN CONFIGURATIONS TOP VIEW 7 8 DALLAS DS87C530 DS83C530 20 21 WINDOWED LCC 39 40 DALLAS DS87C530 DS83C530 52 1 The High-Speed Microcontroller User’s Guide must be used in conjunction with this data sheet. Download it at: www.maxim-ic.com/microcontrollers Real-Time Clock PLCC ...
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... The EMI reduction feature allows software to select a reduced emission mode. This disables the ALE signal when it is unneeded. The DS83C530 is a factory mask ROM version of the DS87C530 designed for high-volume, cost- sensitive applications identical in all respects to the DS87C530, except that the 16kB of EPROM is replaced by a user-supplied application program ...
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... RST 23 16 XTAL2 24 17 XTAL1 DS87C530/ DS83C530 +5V Processor Power Supply Processor Digital Circuit Ground +5V RTC Supply isolated from V CC2 RTC Circuit Ground Reset Input. This pin contains a Schmitt voltage input to recognize external active high reset inputs. The pin also employs an internal pulldown resistor to allow for a combination of wired OR external reset sources ...
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PIN DESCRIPTION (continued) PIN NAME PLCC TQFP 38 31 PSEN 39 32 ALE 50 43 P0.0 (AD0 P0.1 (AD1 P0.2 (AD2 P0.3 (AD3 P0.4 (AD4 P0.5 (AD5 P0.6 ...
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PIN DESCRIPTION (continued) PIN NAME PLCC TQFP 30 23 P2.0 (AD8 P2.1 (AD9 P2.2 (AD10 P2.3 (AD11 P2.4 (AD12 P2.5 (AD13 P2.6 (AD14 P2.7 (AD15) 15 ...
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... DS87C530/DS83C530. The exception is critical timing since the high-speed microcontrollers perform its instructions much faster than the original for any given crystal selection. The DS87C530/DS83C530 run the standard 8051 instruction set. They are not pin compatible with other 8051s due to the timekeeping crystal ...
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... Therefore, they required the same amount of time. In the DS87C530/DS83C530, the MOVX instruction takes as little as two machine cycles or eight oscillator cycles but the “MOV direct, direct” uses three machine cycles or 12 oscillator cycles. While both are faster than their original counterparts, they now have different execution times ...
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Table 1. Special Function Register Locations * Functions not present in the 80C52 are in bold. REGISTER BIT 7 BIT 6 P0 P0.7 P0.6 SP DPL DPH DPL1 DPH1 DPS 0 0 PCON SMOD0 SMOD_0 TCON TF1 TR1 TMOD GATE ...
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... RTCD1 NONVOLATILE FUNCTIONS The DS87C530/DS83C530 provide two functions that are permanently powered if a user supplies an external energy source. These are an on-chip RTC and a nonvolatile SRAM. The chip contains all related functions and controls. The user must supply a backup source and a 32.768kHz timekeeping crystal. ...
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... The following describes guidelines for choosing these devices. Timekeeping Crystal The DS87C530/DS83C530 can use a standard 32.768kHz crystal as the RTC time base. There are two versions of standard crystals available, with 6pF and 12.5pF load capacitance. The tradeoff is that the 6pF uses less power, giving longer life while V pin ...
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... Figure 3. Internal Backup Circuit IMPORTANT APPLICATION NOTE The pins on the DS87C530/DS83C530 are generally as resilient as other CMOS circuits. They have no unusual susceptibility to electrostatic discharge (ESD) or other electrical transients. However, no pin on the DS87C530/DS83C530 should ever be taken to a voltage below ground. Negative voltages on any pin can turn on internal parasitic diodes that draw current directly from the battery device pin is connected to the “ ...
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... PROGRAM MEMORY ACCESS On-chip ROM begins at address 0000h and is contiguous through 3FFFh (16kB). Exceeding the maximum address of on-chip ROM will cause the DS87C530/DS83C530 to access off-chip memory. However, the maximum on-chip decoded address is selectable by software using the ROMSIZE feature. Software can cause the microcontroller to behave like a device with less on-chip memory. This is beneficial when overlapping external memory, such as Flash, is used ...
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... When disabled, the 1kB memory area is transparent to the system memory map. Any MOVX directed to the space between 0000h and FFFFh goes to the expanded bus on Ports 0 and 2. This also is the default condition. This default allows the DS87C530/DS83C530 to drop into an existing system that uses these addresses for other hardware and still have full compatibility. ...
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... SRAM. STRETCH MEMORY CYCLE The DS87C530/DS83C530 allow software to adjust the speed of off-chip data memory access. The microcontrollers can perform the MOVX in as few as two instruction cycles. The on-chip SRAM uses this speed and any MOVX instruction directed internally uses two cycles. However, the time can be stretched for interface to external devices ...
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... The timing of block moves of data memory is faster using the Dual Data Pointer (DPTR). The standard 8051 DPTR is a 16-bit value that is used to address off-chip data RAM or peripherals. In the DS87C530/DS83C530, the standard data pointer is called DPTR, located at SFR addresses 82h and 83h. These are the standard locations. Using DPTR requires no modification of standard code. The new DPTR at SFR 84h and 85h is called DPTR1 ...
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... Power Management Mode offers a complete scheme of reduced internal clock speeds that allow the CPU to run software but to use substantially less power. During default operation, the DS87C530/DS83C530 use four clocks per machine cycle. Thus the instruction cycle rate is (Clock/4). At 33MHz crystal speed, the instruction cycle speed is 8 ...
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... CRYSTAL-LESS PMM A major component of power consumption in PMM is the crystal amplifier circuit. The DS87C530/DS83C530 allow the user to switch CPU operation to an internal ring oscillator and turn off the crystal amplifier. The CPU would then have a clock source of approximately 2MHz to 4MHz, divided by either 4, 64, or 1024. The ring is not accurate, so software cannot perform precision timing. However, this mode allows an additional saving of between 0 ...
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... Information in the Status register assists decisions about switching into PMM. This register contains information about the level of active interrupts and the activity on the serial ports. The DS87C530/DS83C530 support three levels of interrupt priority. These levels are Power-fail, High, and Low. Bits STATUS.7–5 indicate the service status of each level. If PIP (Power-fail Interrupt Priority; ...
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... Set the XTOFF bit this time, the crystal oscillation will begin. The DS87C530/DS83C530 then provide a warm-up delay to make certain that the frequency is stable. Hardware will set the XTUP bit (STATUS. when the crystal is ready for use. Then software should write XT begin operating from the crystal ...
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Table 6. PMM Control and Status Bit Summary NAME LOCATION Control. XT/ RG =1, runs from crystal or external EXIF.3 XT/ RG clock; XT/ RG =0, runs from internal ring oscillator. Status. RGMD=1, CPU clock = ring; RGMD = 0, ...
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Figure 5. Invoking and Clearing PMM ...
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... One exception is that a RTC interrupt can cause the device to exit Stop mode. This provides a very power efficient way of performing infrequent yet periodic tasks. The DS87C530/DS83C530 provide two enhancements to the Stop mode. As documented below, the device provides a bandgap reference to determine Power-fail Interrupt and Reset thresholds. The default state is that the bandgap reference is off while in Stop mode ...
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... EMI REDUCTION One of the major contributors to radiated noise in an 8051-based system is the toggling of ALE. The DS87C530/DS83C530 allow software to disable ALE when not used by setting the ALEOFF (PMR.2) bit to 1. When ALEOFF = 1, ALE will still toggle during an off-chip MOVX. However, ALE will remain in a static when performing on-chip memory access ...
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... The DS87C530/DS83C530 architecture normally uses 4 clocks per machine cycle. However, in the area of timers and serial ports, the DS87C530/DS83C530 will default to 12 clocks per cycle on reset. This allows existing code with real-time dependencies such as baud rates to operate properly. ...
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... If the PFI is enabled and the bandgap select bit (BGS) is set, a PFI will bring the device out of Stop mode. WATCHDOG TIMER To prevent software from losing control, the DS87C530/DS83C530 include a programmable watchdog timer. The Watchdog is a free-running timer that sets a flag if allowed to reach a preselected timeout. It can be (re)started by software. ...
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... Watchdog Interrupt using EWDI (EIE.4). INTERRUPTS The DS87C530/DS83C530 provide 14 interrupt sources with three priority levels. The Power-Fail Interrupt (PFI) has the highest priority. Software can assign high or low priority to other sources. All interrupts that are new to the 8051 family, except for the PFI, have a lower natural priority than the originals ...
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TIMED-ACCESS PROTECTION It is useful to protect certain SFR bits from an accidental write operation. The Timed-Access procedure stops an errant CPU from accidentally changing these bits. It requires that the following instructions precede a write of a protected bit. ...
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DS87C530 SECURITY OPTIONS The DS87C530 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64- byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted form. Lock Bits The security ...
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Table 9. EPROM Programming Modes MODE RST Program Code Data H Verify Code Data H Program Encryption H Array Address 0-3Fh Program Lock LB1 H Bits LB2 H LB3 H Program Option H Register Address FCh Read Signature or Option ...
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... The DS83C530 supports a subset of the EPROM features found on the DS87C530. SECURITY OPTIONS Lock Bits The DS83C530 employs a lock that restricts viewing of the ROM contents. When set, the lock will prevent MOVC instructions in external memory from reading program bytes in internal memory. When locked, the pin is sampled and latched on reset ...
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... DS83C530 ROM Verification The DS83C530 memory contents can be verified using a standard EPROM programmer. The memory address to be verified is placed on the pins shown in Figure 7, and the programming control pins are set to the levels shown in Table 9. The data at that location is then asserted on port 0. ...
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ABSOLUTE MAXIMUM RATINGS Voltage Range on Any Pin Relative to Ground……………………………………………….………-0. Voltage Range on V Relative to Ground…………………………………………………………………..-0.3V to +6.0V CC Operating Temperature Range………………………………………………………………………………….0°C to +70°C Storage Temperature Range……………………………………………………………………...-55°C to +125°C (Note 1) Soldering Temperature………………………………………………………………………..See IPD/JEDEC J-STD-020A This ...
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DC ELECTRICAL CHARACTERISTICS (continued 4.5V to 5.5V -40°C to +85°C PARAMETER Input Leakage Port Pins, I/O Mode Input Leakage Port 0, Bus Mode RST Pulldown Resistance Note 1: Storage temperature is ...
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AC ELECTRICAL CHARACTERISTICS (Note 1) PARAMETER External Oscillator Oscillator Frequency External Crystal ALE Pulse Width Port 0 Address Valid to ALE Low Address Hold after ALE Low ALE low to Valid Instruction In ALE Low to Low PSEN Pulse Width ...
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MOVX CHARACTERISTICS USING STRETCH MEMORY CYCLES PARAMETER Data Access ALE Pulse Width Port 0 Address Valid to ALE Low Address Hold After ALE Low for MOVX Write RD Pulse Width WR Pulse Width RD Low Valid Data In Data Hold ...
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MOVX CHARACTERISTICS USING STRETCH MEMORY CYCLES (continued EXTERNAL CLOCK CHARACTERISTICS PARAMETER Clock High Time Clock Low Time Clock Rise Time Clock Fall ...
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EXPLANATION OF AC SYMBOLS In an effort to remain compatible with the original 8051 family, this device specifies the same parameters as such devices, using the same symbols. For completeness, the following is an explanation of the symbols. t Time ...
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EXTERNAL PROGRAM MEMORY READ CYCLE EXTERNAL DATA MEMORY READ CYCLE t VALL2 ...
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DATA MEMORY WRITE CYCLE DATA MEMORY WRITE WITH STRETCH = 1 t AVLL2 ...
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DATA MEMORY WRITE WITH STRETCH = 2 EXTERNAL CLOCK DRIVE ...
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SERIAL PORT MODE 0 TIMING ...
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POWER-CYCLE TIMING EPROM PROGRAMMING AND VERIFICATION WAVEFORMS ...
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PACKAGE INFORMATION (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/DallasPackInfo ...
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PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/DallasPackInfo ...
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PACKAGE INFORMATION (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information www.maxim-ic.com/DallasPackInfo.) PKG 52-PIN DIM MIN NOM A — — A1 0.05 0.10 A2 0.95 1.00 ...
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... No circuit patent licenses are implied. Maxim/Dallas Semiconductor reserves the right to change the circuitry and specifications without notice at any time DS87C530/DS83C530 EPROM/ROM Microcontrollers with Real-Time Clock DESCRIPTION ...