A29040-120 AMICC [AMIC Technology], A29040-120 Datasheet - Page 10

• Manufacturer Part Number: A29040-120
• Description: 512K X 8 Bit CMOS 5.0 Volt-only, Uniform Sector Flash Memory
• Manufacturer: AMICC [AMIC Technology]

Legend:
X = Don't care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the
PD = Data to be programmed at location PA. Data latches on the rising edge of
SA = Address of the sector to be verified (in autoselect mode) or erased. Address bits A18 - A16 select a unique sector.
Note:
1. See Table 1 for description of bus operations.
2. All values are in hexadecimal.
3. Except when reading array or autoselect data, all bus cycles are write operation.
4. Address bits A18 - A11 are don't cares for unlock and command cycles, unless SA or PA required.
5. No unlock or command cycles required when reading array data.
6. The Reset command is required to return to reading array data when device is in the autoselect mode, or if I/O
7. The fourth cycle of the autoselect command sequence is a read cycle.
8. The data is 00h for an unprotected sector and 01h for a protected sector. See "Autoselect Command Sequence" for more
9. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend
10. The Erase Resume command is valid only during the Erase Suspend mode.
11. The time between each command cycle has to be less than 50 s.
PRELIMINARY
Chip Erase
Sector Erase
Read (Note 5)
Reset (Note 6)
Autoselect
(Note 7)
Program
Erase Suspend (Note 9)
Erase Resume (Note 10)
(while the device is providing status data).
information.
mode.
whichever happens later.
Command
Sequence
(Note 1)
Continuation ID
Sector Protect Verify
(Note 8)
Manufacturer ID
Device ID
(August, 2001, Version 0.5)
4
4
4
4
4
6
6
1
1
1
1
Table 4. A29040 Command Definitions
Addr Data
XXX
XXX
XXX
555
555
555
555
555
555
555
RA
First
AA
AA
AA
AA
RD
AA
AA
AA
B0
30
F0
Addr Data
2AA
2AA
2AA
2AA
2AA
2AA
2AA
Second
10
55
55
55
55
55
55
55
Bus Cycles (Notes 2 - 4)
Addr Data Addr Data Addr Data Addr Data
555
555
555
555
555
555
555
Third
WE
90
A0
90
90
90
80
80
or
X03
CE
X00
X01
X02
555
555
SA
PA
Fourth
pulse, whichever happens first.
PD
AA
86
AA
37
7F
00
01
AMIC Technology, Inc.
2AA
2AA
A29040 Series
Fifth
55
55
WE
555
SA
or
Sixth
5
CE
goes high
30
10
pulse,