GAL20LV8ZD-25QJ LATTICE [Lattice Semiconductor], GAL20LV8ZD-25QJ Datasheet - Page 11

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GAL20LV8ZD-25QJ

Manufacturer Part Number
GAL20LV8ZD-25QJ
Description
Low Voltage, Zero Power E2CMOS PLD Generic Array Logic
Manufacturer
LATTICE [Lattice Semiconductor]
Datasheet
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Description section.
3) Refer to fmax Description section.
AC Switching Characteristics
PARAM
Capacitance (T
f
max
t
t
t
t
t
t
t
t
t
wh
dis
pd
co
cf
su
en
wl
SYMBOL
h
2
3
C
C
I/O
I
COND.
TEST
C
C
A
A
A
A
A
B
B
1
Input or I/O to Combinatorial Output
Clock to Output Delay
Clock to Feedback Delay
Setup Time, Input or Fdbk before Clk
Hold Time, Input or Fdbk after Clk
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
Maximum Clock Frequency with
No Feedback
Clock Pulse Duration, High
Clock Pulse Duration, Low
Input or I/O to Output Enabled
OE to Output Enabled
Input or I/O to Output Disabled
OE to Output Disabled
DESCRIPTION
A
= 25 C, f = 1.0 MHz)
Input Capacitance
I/O Capacitance
PARAMETER
Over Recommended Operating Conditions
TYPICAL
8
8
11
Specifications GAL20LV8ZD
UNITS
pF
pF
MIN. MAX.
45.5
62.5
12
50
3
2
0
8
8
COM
TEST CONDITIONS
-15
V
V
CC
CC
15
10
17
16
18
17
= 3.3V, V
8
= 3.3V, V
33.3
41.6
MIN. MAX.
15
40
12
12
3
2
0
COM
-25
I/O
I
= 0V
= 0V
25
15
10
25
20
25
20
UNITS
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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