ADUM1100ARWZ AD [Analog Devices], ADUM1100ARWZ Datasheet - Page 4
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ADUM1100ARWZ
Manufacturer Part Number
ADUM1100ARWZ
Description
Manufacturer
AD [Analog Devices]
Datasheet
1.ADUM1100ARWZ.pdf
(8 pages)
AN-793
Figure 5 shows an ESD test setup and the paths of cur-
rents I
can be very large, and induce large magnetic fields on
the application printed wiring board and chassis. The
placement and geometry of ground traces, ground
circuit connections, board location, and orientation
within the chassis are all critical in minimizing inductive
pickup from the radiated magnetic fields.
Figure 5a shows a poor layout which uses a thin ground
trace near the iCoupler. It also shows a ground loop that
allows some of I
circuit as I
increase the magnitude of the induced magnetic field.
If strong enough, this can cause iCoupler latch-up as
discussed above. Figure 5b shows an optimal design
using a wide ground plane further away from the
iCoupler and a single point ground which prevents
I
designing ground circuits, it is always helpful to think in
terms of current paths.
When designing the chassis for the system, it is impor-
tant to minimize impedance of the chassis ground con-
nection. It is also helpful to mount printed circuit boards
as far away from the edge of the chassis as possible, and
to have the board oriented so that iCouplers are parallel
to any radiated magnetic fields as depicted in Figure 6.
ESD
POOR GROUND TECHNIQUE:
1. GROUND LOOP ALLOWS PART OF THE LESD
2. THIN GROUND CONDUCTOR WILL RADIATE
GOOD GROUND TECHNIQUE:
1. USE OF WIDE GROUND PLANE LOWERS
2. NO LOOP SO LESD FLOWS THROUGH THE
iCoupler
iCoupler
TO FLOW THROUGH BOARD GROUND
MAGNETIC FIELD AND CAUSE PICKUP IN
iCoupler TRANSFORMERS
INDUCTANCE AND WILL LOWER NOISE
CHASSIS ONLY
from flowing in the board ground circuit. When
Figure 5. Contrasting Examples of Board
Ground Circuits
ESD
and I
APPLICATION BOARD
APPLICATION BOARD
1
. Close proximity and narrow trace widths
1
caused by an ESD strike. These currents
ESD
to flow through the board ground
GROUND
PLANE
I
I
1
1
I
I
I
2
ESD
ESD
ESD ZAP POINT
ESD ZAP POINT
SYSTEM
CHASSIS
SYSTEM
CHASSIS
FIGURE 5a
FIGURE 5b
GROUND
GROUND
LAYOUT
LAYOUT
GOOD
POOR
–4–
If inductive coupling is a problem, recommended solu-
tions include the following:
•
•
•
•
IEC 61000-4-5 Surge Testing
Surge testing per IEC 61000 - 4 -5 is another common
system - level test in industrial and instrumentation
applications. Figure 7 depicts an iCoupler in a surge
test configuration showing associated bypass and stray
capacitances. V
between earth ground and the board’s local ground
GND
shown in Figure 7, if excessive stray capacitance exists
across the isolation barrier, the voltage at V
driven above its absolute maximum rating and damage
the iCoupler.
TRANSFORMER
Properly design ground system to avoid ground
loops.
Use ground plane instead of single narrow traces.
Orient print wiring boards away from chassis
boundaries.
If possible, orient the iCoupler parallel to external
magnetic fields as depicted in Figure 6.
CHIP SCALE
PACKAGE
1
iCoupler
Figure 6. External Magnetic Field Interaction
with iCouplerTranformers
. This test typically has test voltages up to 4 kV. As
V
TRANSFORMER
INDUCED
MAGNETIC FIELD ORIENTATION RIGHT
ANGLE TO TRANSFORMER WINDINGS
MAXIMIZES V
V
CHIP SCALE
DD
WORST ORIENTATION
+
–
BEST ORIENTATION
TEST
INDUCED
is the surge test voltage appearing
PC BOARD
MAGNETIC FIELD ORIENTATION
PARALLEL TO TRANSFORMER
WINDINGS MINIMIZES V
iCoupler
PACKAGE
DD1
can be
REV. 0
INDUCED