ATMEGA48V_09 ATMEL [ATMEL Corporation], ATMEGA48V_09 Datasheet - Page 208
ATMEGA48V_09
Manufacturer Part Number
ATMEGA48V_09
Description
8-bit Microcontroller with 8K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_09.pdf
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21. 2-wire Serial Interface
21.1
21.2
21.2.1
208
Features
2-wire Serial Interface Bus Definition
ATmega48/88/168
TWI Terminology
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The 2-wire Serial Interface (TWI) is ideally suited for typical microcontroller applications. The
TWI protocol allows the systems designer to interconnect up to 128 different devices using only
two bi-directional bus lines, one for clock (SCL) and one for data (SDA). The only external hard-
ware needed to implement the bus is a single pull-up resistor for each of the TWI bus lines. All
devices connected to the bus have individual addresses, and mechanisms for resolving bus
contention are inherent in the TWI protocol.
Figure 21-1. TWI Bus Interconnection
The following definitions are frequently encountered in this section.
Table 21-1.
Term
Master
Simple Yet Powerful and Flexible Communication Interface, only two Bus Lines Needed
Both Master and Slave Operation Supported
Device can Operate as Transmitter or Receiver
7-bit Address Space Allows up to 128 Different Slave Addresses
Multi-master Arbitration Support
Up to 400 kHz Data Transfer Speed
Slew-rate Limited Output Drivers
Noise Suppression Circuitry Rejects Spikes on Bus Lines
Fully Programmable Slave Address with General Call Support
Address Recognition Causes Wake-up When AVR is in Sleep Mode
Compatible with Philips I
SDA
SCL
TWI Terminology
Description
The device that initiates and terminates a transmission. The Master also generates the
SCL clock.
Device 1
2
C protocol
Device 2
Device 3
........
Device n
V
CC
R1
R2
2545R–AVR–07/09
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