ADP1053 AD [Analog Devices], ADP1053 Datasheet - Page 36

• Manufacturer Part Number: ADP1053
• Description: 3-Channel Digital
• Manufacturer: AD [Analog Devices]

ADP1053
Clock Generation and Stretching
The
system; therefore, the device never needs to generate the clock,
which is done by the master device in the system. However, the
PMBus slave device is capable of clock stretching to put the
master in a wait state. By stretching the SCL signal during the
low period, the slave device communicates to the master device
that it is not ready and that the master device must wait.
Conditions where the PMBus slave device stretches the SCL line
low include the following:
•
•
•
Note that the slave device can stretch the SCL line only during
the low period. Also, whereas the I
indefinite stretching of the SCL line, the PMBus specification
limits the maximum time that the SCL line can be stretched,
or held low, to 25 ms, after which the device must release the
communication lines and reset its state machine.
GENERAL CALL SUPPORT
The PMBus slave is capable of decoding and acknowledging
a general call address. The PMBus device responds to both its
own address and the general call address (0x00). The general
call address enables all devices on the PMBus to be written to
simultaneously.
Note that all PMBus commands must start with the slave
address with the R/ W bit cleared (set to 0), followed by the
command code. This is also true when using the general call
address to communicate with the PMBus slave device.
ADP1053
The master device is transmitting at a higher baud rate
than the slave device.
The receive buffer of the slave device is full and must be
read before continuing. This prevents a data overflow
condition.
The slave device is not ready to send data that the master
has requested.
is always a PMBus slave device in the overall
S
MASTER TO SLAVE
SLAVE TO MASTER
7-BIT SLAVE
ADDRESS
S
MASTER TO SLAVE
SLAVE TO MASTER
7-BIT SLAVE
ADDRESS
W
A
2
COMMAND
C specification allows
CODE
W
A
COMMAND
A
CODE
Sr
7-BIT SLAVE
ADDRESS
A
Figure 36. Block Write Protocol
Figure 37. Block Read Protocol
BYTE COUNT =
Rev. A | Page 36 of 84
R
N
A
BYTE COUNT =
A
FAST MODE
Fast mode (400 kHz) uses essentially the same mechanics as
the standard mode of operation; the electrical specifications
and timing are most affected. The PMBus slave is capable of
communicating with a master device operating in standard
mode (100 kHz) or fast mode.
FAULT CONDITIONS
The PMBus protocol provides a comprehensive set of fault
conditions that must be monitored and reported. These fault
conditions can be grouped into two major categories: commu-
nication faults and monitoring faults.
Communication faults are error conditions associated with the
data transfer mechanism of the PMBus protocol. Monitoring
faults are error conditions associated with the operation of the
ADP1053, such as output overvoltage protection. These fault
conditions are described in the Power Monitoring and Flags
section.
TIMEOUT CONDITIONS
The SMBus specification, Version 2.0, includes three clock
stretching specifications related to timeout conditions.
T
A timeout condition occurs if any single SCL clock pulse is held
low for longer than the t
the timeout condition, the PMBus slave device has 10 ms to abort
the transfer, release the bus lines, and be ready to accept a new
start condition. The device initiating the timeout is required to
hold the SCL clock line low for at least t
guaranteeing that the slave device is given enough time to reset
its communication protocol.
T
This condition is not supported by the ADP1053.
T
This condition is not supported by the ADP1053.
N
DATA BYTE 1
TIMEOUT
LOW:SEXT
LOW:MEXT
A
DATA BYTE 1
A
DATA BYTE N
A
TIMEOUT
DATA BYTE N
of 25 ms (min). Upon detecting
A
P
TIMEOUT MAX
A
P
Data Sheet
= 35 ms,