IR21141SSPBF_09 IRF [International Rectifier], IR21141SSPBF_09 Datasheet - Page 16

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IR21141SSPBF_09

Manufacturer Part Number
IR21141SSPBF_09
Description
HALF-BRIDGE GATE DRIVER IC
Manufacturer
IRF [International Rectifier]
Datasheet
www.irf.com
Referred to the timing diagram of Fig. 17:
A.
B.
C. When
D. The DSH goes high but this is not read
E.
F.
G.
When the input signals are on together the
outputs go off (anti-shoot through),
The HO signal is on and the high side IGBT
desaturates, the HO turn off softly while the
SY_FLT stays low. When SY_FLT goes high
the FAULT/SD goes low. While in SSD, if LIN
goes up, LO does not change (freeze),
FAULT/SD section) FLT_CLR can disable it
and the outputs go back to follow the inputs,
because HO is off,
The LO signal is on and the low side IGBT
desaturates, the low side behaviour is the
same as described in point B,
The DSL goes high but this is not read as LO
is off,
As point A (anti-shoot through
FAULT/SD
is
latched
).
low
(see
16
Referred to the timing diagram Fig. 18:
A.
B.
C. Externally driven low FAULT/SD (shutdown
D. The FAULT/SD is released and the outputs go
E.
F.
The device is in the hold state, regardless of
input variations. The hold state results as
SY_FLT is forced low externally,
The device outputs go off by hard shutdown,
externally commanded. A through B is the
same sequence adopted by another IR2x14x
device in SSD procedure.
state) cannot be disabled by forcing FLT_CLR
(see FAULT/SD section),
back to follow the inputs,
Externally driven low FAULT/SD: outputs go
off by hard shutdown (like point B),
As point A and B but for the low side output.
IR21141/IR22141SSPbF
© 2009 International Rectifier

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