HYB18T512400BF-2.5 QIMONDA [Qimonda AG], HYB18T512400BF-2.5 Datasheet - Page 32

• Manufacturer Part Number: HYB18T512400BF-2.5
• Description: 512-Mbit Double-Data-Rate-Two SDRAM
• Manufacturer: QIMONDA [Qimonda AG]

1)
2) Impedance measurement condition for output source dc current:
3) Mismatch is absolute value between pull-up and pull-down, both measured at same temperature and voltage.
4) This represents the step size when the OCD is near 18 Ohms at nominal conditions across all process parameters and represents only
5) The absolute value of the Slew Rate as measured from DC to DC is equal to or greater than the Slew Rate as measured from AC to AC.
6) Timing skew due to DRAM output Slew Rate mis-match between DQS / DQS and associated DQ’s is included in
7) DRAM output Slew Rate specification applies to 400, 533 and 667 MT/s speed bins.
Rev. 1.1, 2007-05
03292006-YBYM-WG0Z
Symbol
—
—
—
S
OUT
V
23.4 Ohms for values of
1.7 V;
the DRAM uncertainty. A 0 Ohm value (no calibration) can only be achieved if the OCD impedance is 18
conditions.
This is verified by design and characterization but not subject to production test.
specification.
DDQ
= 1.8 V
V
OUT
= –280 mV;
Description
Output Impedance
Pull-up / Pull down mismatch
Output Impedance step size
for OCD calibration
Output Slew Rate
±
0.1 V;
V
DD
V
V
OUT
OUT
= 1.8 V
/
between
I
OL
±
must be less than 23.4 Ohms for values of
0.1 V
V
DDQ
and
V
DDQ
– 280 mV. Impedance measurement condition for output sink dc current:
Min.
—
0
0
1.5
32
V
DDQ
= 1.7 V,
V
Nominal
—
—
—
OUT
V
OUT
between 0 V and 280 mV.
= 1420 mV; (
512-Mbit Double-Data-Rate-Two SDRAM
4
1.5
Max.
5.0
V
OCD Default Characteristics
HYB18T512[40/80/16]0B[C/F]
OUT
–
V
±
DDQ
0.75 Ohms under nominal
) /
Unit
Ω
Ω
Ω
V / ns
I
Internet Data Sheet
OH
t
DQSQ
must be less than
TABLE 33
and
t
QHS
Note
1)2)
1)2)3)
4)
1)5)6)7)
V
DDQ
=