S-93A46A SII [Seiko Instruments Inc], S-93A46A Datasheet - Page 15

• Manufacturer Part Number: S-93A46A
• Description: CMOS SERIAL E2PROM
• Manufacturer: SII [Seiko Instruments Inc]

Rev.2.1
CS
SK
DO
DI
4.5 Erasing Chip (ERAL)
CS
SK
DO
DI
To erase the data of the entire memory address space, set all the data to 1, change CS to high, and
then input the ERAL instruction and an address following the start bit. Any address can be input.
There is no need to input data. The chips erase operation starts when CS goes low. When the clocks
more than the specified number have been input, the clock pulse monitoring circuit cancels the ERAL
instruction. For details of the clock pulse monitoring circuit, refer to “
Write due to Erroneous Instruction Recognition ”.
_00
<1>
1
<1>
0
1
2
0
2
3
0
Figure 13 Chip Erase Timing (S-93A56A/66A)
1
4
3
0
Figure 12 Chip Erase Timing (S-93A46A)
0
1
4
5
0
5
6
Seiko Instruments Inc.
6
7
6Xs
7
8
4Xs
9
8
10
9
t
CDS
11
t
CDS
t
SV
t
t
PR
SV
CMOS SERIAL E
B usy
Function to Protect Against
Verify
t
PR
S-93A46A/56A/66A
B usy
R eady
Verify
R eady
Standby
Hi-Z
t
HZ1
Standby
2
PROM
Hi-Z
t
HZ1
15