93C46A-E/MC MICROCHIP [Microchip Technology], 93C46A-E/MC Datasheet - Page 10
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93C46A-E/MC
Manufacturer Part Number
93C46A-E/MC
Description
1K Microwire Compatible Serial EEPROM
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.93C46A-EMC.pdf
(28 pages)
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
2.8
The WRITE instruction is followed by 8 bits (if ORG is
low or A-version devices) or 16 bits (if ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA46A/B/C and 93LC46A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C46A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
FIGURE 2-8:
FIGURE 2-9:
DS21749F-page 10
CLK
CLK
DO
DO
CS
CS
DI
DI
Write
1
1
High-Z
High-Z
WRITE TIMING FOR 93AA AND 93LC DEVICES
WRITE TIMING FOR 93C DEVICES
0
0
1
1
An
An
•••
•••
A0
A0
Dx
Dx
•••
•••
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (T
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
D0
D0
Note:
CSL
T
T
CSL
CSL
). DO at logical ‘0’ indicates that programming
T
After the Write cycle is complete, issuing a
Start bit and then taking CS low will clear
the Ready/Busy status from DO.
WC
T
WC
Busy
Busy
T
T
SV
SV
© 2005 Microchip Technology Inc.
Ready
Ready
High-Z
High-Z
T
T
CZ
CZ