DS2502/R DALLAS [Dallas Semiconductor], DS2502/R Datasheet
DS2502/R
Related parts for DS2502/R
DS2502/R Summary of contents
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FEATURES 1024 bits Electrically Programmable Read Only Memory (EPROM) communicates with the economy of one signal plus ground Unique, factory-lasered and tested 64-bit registration number (8-bit family code + 48- bit serial number + 8-bit CRC tester) assures ...
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ORDERING INFORMATION Standard Lead-Free DS2502 DS2502+ DS2502/T&R DS2502+T&R DS2502R/T&R DS2502R+T&R DS2502P DS2502P+ DS2502P/T&R DS2502P+T&R DS2502S DS2502S+ DS2502S/T&R DS2502S+T&R DS2502X1 + Indicates lead-free compliance. DESCRIPTION The DS2502 1 kbit Add-Only Memory identifies and stores relevant information about the product to which ...
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The protocol required for these ROM Function Commands is described in Figure 9. After a ROM Function Command is successfully ...
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HIERARCHICAL STRUCTURE FOR 1-WIRE PROTOCOL Figure 2 64-BIT LASERED ROM Figure 3 8–Bit CRC Code MSB 1-WIRE CRC GENERATOR Figure 4 48–Bit Serial Number LSB MSB 8–Bit Family Code (09h) LSB MSB LSB ...
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EPROM The memory map in Figure 5 shows the 1024-bit EPROM section of the DS2502 which is configured as four pages of 32 bytes each. The 8-bit scratchpad is an additional register that acts as a buffer when programming ...
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Writing data involves not only issuing the correct command sequence by also providing a 12- volt programming voltage at the appropriate times. To execute a write sequence, a byte of data is first loaded into the scratchpad and ...
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MEMORY FUNCTION FLOW CHART Figure ...
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MEMORY FUNCTION FLOW CHART Figure 6 (cont’d) LEGEND: DECISION MADE BY THE MASTER DECISION MADE BYDS2502 ...
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MEMORY FUNCTION FLOW CHART Figure 6 (cont’ ...
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READ MEMORY [F0H] The Read Memory command is used to read data from the 1024-bit EPROM data field. The bus master follows the command byte with a 2-byte address (TA1=(T7:T0), TA2=(T15:T8)) that indicates a starting byte location within the data ...
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CRC that is the result of shifting into the CRC generator all of the data bytes from the initial starting byte to the last byte of the current page. Once the ...
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CRC generator as a starting value. The bus master will issue the next byte of data using eight write time slots. As the DS2502 receives this ...
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DS2502 will automatically increment its address counter to select the next byte in the EPROM Status data field. The least significant byte of ...
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A multidrop bus consists of a 1-Wire bus with multiple slaves attached. At regular speed the 1-Wire bus has a maximum data rate of 16.3 kbits per second. If the bus master is also required to perform programming of the ...
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DS2502 EQUIVALENT CIRCUIT Figure 7 BUS MASTER CIRCUIT Figure ...
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ROM FUNCTIONS FLOW CHART Figure ...
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Skip ROM [CCH] This command can save time in a single-drop bus system by allowing the bus master to access the memory functions without providing the 64-bit ROM code. If more than one slave is present on the bus and ...
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CRC GENERATION The DS2502 has an 8-bit CRC stored in the most significant byte of the 64-bit ROM. The bus master can compute a CRC value from the first 56 bits of the 64-bit ROM and compare it to the ...
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READ/WRITE TIMING DIAGRAM Figure 11 Write-one Time Slot Write-zero Time Slot Read-data Time Slot RESISTOR MASTER DS2502 DS2502 SAMPLING WINDOW 60 μs ≤ t < 120 μs SLOT 1 μs ≤ t < 15 μs LOW1 1 μs ≤ t ...
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PROGRAM PULSE TIMING DIAGRAM Figure ...
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ABSOLUTE MAXIMUM RATINGS* Voltage on any Pin Relative to Ground Operating Temperature Storage Temperature Soldering Temperature * This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the ...
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NOTES: 1. All voltages are referenced to ground external pullup voltage. PUP 3. Input load is to ground additional reset or communication sequence cannot begin until the reset high time has expired. 5. Read data ...