LAN91C96_07 SMSC [SMSC Corporation], LAN91C96_07 Datasheet - Page 104
LAN91C96_07
Manufacturer Part Number
LAN91C96_07
Description
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Manufacturer
SMSC [SMSC Corporation]
Datasheet
1.LAN91C96_07.pdf
(125 pages)
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Rev. 03-28-07
A0-15
AEN,
nSBHE
nIOCS16
nIORD
nIOWR
D0-D15
IOCHRDY
*Note: Assuming NO WAIT ST = 0 in configuration register and cycle time observed.
**Note: The cycle time is defined only for accesses to the Data Register as follows:
t10
t20
t9
For Data Register Read - From nIORD falling to next nIORD falling
For Data Register Write - From nIOWR rising to next nIOWR rising
Z
Control Active to IOCHRDY Low
IOCHRDY Low Pulse Width*
Cycle time**
Figure 12.6 – Local Bus Consecutive Read and Write Cycles
Z
VALID ADDRESS
t9
Parameter
t10
DATASHEET
VALID DATA
t20
Page 104
Z
Non-PCI Single-Chip Full Duplex Ethernet Controller with Magic Packet
Z
min
100
185
typ
VALID ADDRESS
max
150
12
VALID DATA
units
ns
ns
ns
SMSC LAN91C965v&3v
Z
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