MC68HC705T16 MOTOROLA [Motorola, Inc], MC68HC705T16 Datasheet - Page 65
MC68HC705T16
Manufacturer Part Number
MC68HC705T16
Description
High-density complementary metal oxide semiconductor (HCMOS) microcontroller unit
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC705T16.pdf
(128 pages)
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The Pulse Accumulator is an 8-bit counter that can operate in either of two modes; event counting
mode and the gated time accumulation mode. The operating mode is selected by a control bit in
the Pulse Accumulator Control register.
In the event counting mode, the 8-bit counter is clocked by the signal on the PACIN pin. The
maximum clocking rate for the external counting mode is E (CPU) clock divided by two.
In the gated time accumulation mode, the 8-bit counter is driven by E clock divided by 64. The
counter will increment when PACIN pin is high and halt when PACIN is low.
7.1
Two registers are associated with the Pulse Accumulator; they are described below.
7.1.1
Register bit definitions:
PAOF - PAC Overflow Interrupt Flag Bit.
It is set when the count in the pulse accumulator rolls over from $FF to $00. PAOF is cleared by
writing a “0” to the bit. An interrupt to the CPU is generated if the PAIE bit is set.
MC68HC05T16
1 (set)
0 (clear) –
Address
$0E
Pulse Accumulator Registers
PAC Control and Status Register (PACTL)
PAOF
–
bit 7
A PAC overflow from $FF to $00 has occurred.
No PAC overflow has occurred.
PULSE ACCUMULATOR
PAEN
bit 6
PAMOD
bit 5
PULSE ACCUMULATOR
PAIE
bit 4
7
bit 3
bit 2
bit 1
bit 0
0000 0000
on reset
State
MOTOROLA
TPG
7-1
7
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