PIC18F2450 MICROCHIP [Microchip Technology], PIC18F2450 Datasheet - Page 179
PIC18F2450
Manufacturer Part Number
PIC18F2450
Description
28/40/44-Pin, High-Performance, 12 MIPS, Enhanced Flash, USB Microcontrollers with nanoWatt Technology
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F2450.pdf
(320 pages)
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The value in the ADRESH:ADRESL registers is not
modified for a Power-on Reset. The ADRESH:ADRESL
registers will contain unknown data after a Power-on
Reset.
After the A/D module has been configured as desired, the
selected channel must be acquired before the conver-
sion is started. The analog input channels must have
their corresponding TRIS bits selected as an input. To
determine acquisition time, see Section 16.1 “A/D
Acquisition Requirements”. After this acquisition time
has elapsed, the A/D conversion can be started. An
acquisition time can be programmed to occur between
setting the GO/DONE bit and the actual start of the
conversion.
The following steps should be followed to perform an
A/D conversion:
1.
2.
3.
4.
FIGURE 16-3:
© 2006 Microchip Technology Inc.
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D acquisition time (ADCON2)
• Select A/D conversion clock (ADCON2)
• Turn on A/D module (ADCON0)
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
Wait the required acquisition time (if required).
Start conversion:
• Set GO/DONE bit (ADCON0 register)
digital I/O (ADCON1)
Legend: C
V
AIN
Rs
V
I
R
SS
C
R
LEAKAGE
PIN
T
IC
HOLD
SS
ANALOG INPUT MODEL
ANx
C
5 pF
PIN
= Input Capacitance
= Threshold Voltage
= Leakage Current at the pin due to
= Interconnect Resistance
= Sampling Switch
= Sample/hold Capacitance (from DAC)
= Sampling Switch Resistance
various junctions
V
Advance Information
DD
V
V
T
T
= 0.6V
= 0.6V
I
±100 nA
LEAKAGE
5.
6.
7.
FIGURE 16-2:
R
IC
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF, if required.
For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
required before the next acquisition starts.
3FFh
3FEh
003h
002h
001h
000h
1k
PIC18F2450/4450
V
DD
SS
Sampling
Switch
AD
6V
5V
4V
3V
2V
R
. A minimum wait of 3 T
SS
Analog Input Voltage
A/D TRANSFER FUNCTION
Sampling Switch
1
V
SS
2
C
HOLD
3
DS39760A-page 177
= 25 pF
4
(k )
AD
is
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