ADSP-21266SKBC-2B AD [Analog Devices], ADSP-21266SKBC-2B Datasheet - Page 9

• Manufacturer Part Number: ADSP-21266SKBC-2B
• Description: SHARC Embedded Processor
• Manufacturer: AD [Analog Devices]

for the A
to the A
recommended ferrite chip is the muRata BLM18AG102SN1D).
To reduce noise coupling, the PCB should use a parallel pair of
power and ground planes for V
to connect the bypass capacitors to the analog power (A
ground (A
in
ground plane on the board—the A
directly to digital ground (GND) at the chip.
TARGET BOARD JTAG EMULATOR CONNECTOR
Analog Devices DSP Tools product line of JTAG emulators uses
the IEEE 1149.1 JTAG test access port of the ADSP-21266 pro-
cessor to monitor and control the target board processor during
emulation. Analog Devices DSP Tools product line of JTAG
emulators provides emulation at full processor speed, allowing
inspection and modification of memory, registers, and proces-
sor stacks. The processor’s JTAG interface ensures that the
emulator will not affect target system loading or timing.
For complete information on Analog Devices’ SHARC DSP
Tools product line of JTAG emulator operation, see the appro-
priate emulator hardware user’s guide.
DEVELOPMENT TOOLS
The ADSP-21266 is supported by a complete automotive refer-
ence design and development board as well as by a complete
home audio reference design board available from Analog
Devices. These boards implement complete audio decoding and
post processing algorithms that are factory programmed into
the ROM space of the ADSP-21266. SIMD optimized libraries
consume less processing resources, which results in more avail-
able processing power for custom proprietary features.
The nonvolatile memory of the ADSP-21266 can be configured
to contain a combination of Dolby Digital, Dolby Pro Logic,
Dolby Pro Logic II, Dolby Pro Logic IIx, DTSES, DTS 96/24,
and Neo:6. Multiple S/PDIF and analog I/Os are provided to
maximize end system flexibility.
The ADSP-21266 is also supported with a complete set of
CROSSCORE
including Analog Devices emulators and VisualDSP++
†
CROSSCORE is a registered trademark of Analog Devices, Inc.
Figure 4
V DDINT
VDD
VDD
HI Z FERRITE
VSS
BEAD CHIP
/A
are inputs to the processor and not the analog
pin. Place the filter components as close as possible
) pins. Note that the A
VSS
®†
software and hardware development tools,
Figure 4. Analog Power Filter Circuit
pins. For an example circuit, see
CLOSE TO A VDD AND A VSS PINS
100nF
LOCATE ALL COMPONENTS
10nF
DDINT
VSS
VDD
and GND. Use wide traces
pin should connect
1nF
and A
VSS
pins specified
ADSP-212xx
Figure
A VDD
A VSS
Rev. B | Page 9 of 44 | May 2005
VDD
®‡
4. (A
) and
development environment. The same emulator hardware that
supports other SHARC processors also fully emulates the
ADSP-21266.
The VisualDSP++ project management environment lets pro-
grammers develop and debug an application. This environment
includes an easy to use assembler (which is based on an alge-
braic syntax), an archiver (librarian/library builder), a linker, a
loader, a cycle-accurate instruction-level simulator, a C/C++
compiler, and a C/C++ runtime library that includes DSP and
mathematical functions. A key point for these tools is C/C++
code efficiency. The compiler has been developed for efficient
translation of C/C++ code to DSP assembly. The ADSP-21266
SHARC DSP has architectural features that improve the
efficiency of compiled C/C++ code.
The VisualDSP++ debugger has a number of important fea-
tures. Data visualization is enhanced by a plotting package that
offers a significant level of flexibility. This graphical representa-
tion of user data enables the programmer to quickly determine
the performance of an algorithm. As algorithms grow in com-
plexity, this capability can have increasing significance on the
designer’s development schedule, increasing productivity. Sta-
tistical profiling enables the programmer to nonintrusively poll
the processor as it is running the program. This feature, unique
to VisualDSP++, enables the software developer to passively
gather important code execution metrics without interrupting
the real-time characteristics of the program. Essentially, the
developer can identify bottlenecks in software quickly and effi-
ciently. By using the profiler, the programmer can focus on
those areas in the program that impact performance and take
corrective action.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, programmers can:
The VisualDSP++ IDDE lets programmers define and manage
DSP software development. Its dialog boxes and property pages
let programmers configure and manage all of the SHARC devel-
opment tools, including the color syntax highlighting in the
VisualDSP++ editor. This capability permits programmers to:
‡
VisualDSP++ is a registered trademark of Analog Devices, Inc.
• View mixed C/C++ and assembly code (interleaved source
• Insert breakpoints
• Set conditional breakpoints on registers, memory,
• Trace instruction execution
• Perform linear or statistical profiling of program execution
• Fill, dump, and graphically plot the contents of memory
• Perform source level debugging
• Create custom debugger windows
• Control how the development tools process inputs and
• Maintain a one-to-one correspondence with the tools’
and object information)
and stacks
generate outputs
command line switches
ADSP-21266