MAX5887EGK MAXIM [Maxim Integrated Products], MAX5887EGK Datasheet
MAX5887EGK
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MAX5887EGK Summary of contents
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... IMD = -85dBc at f ACLR = 72dB at f ♦ 2mA to 20mA Full-Scale Output Current ♦ Differential, LVDS-Compatible Digital and Clock Inputs ♦ On-Chip 1.2V Bandgap Reference ♦ Low 130mW Power Dissipation ♦ 68-Lead QFN-EP Package PART MAX5887EGK *EP = Exposed paddle. TOP VIEW Applications B1P 1 B1N 2 B0P ...
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High Dynamic Performance DAC with Differential LVDS Inputs ABSOLUTE MAXIMUM RATINGS VCLK to AGND................................-0.3V to +3. VCLK to DGND ...............................-0.3V to +3. ...
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High Dynamic Performance DAC with Differential LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference analog output, 50Ω double terminated (Figure 7), ...
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High Dynamic Performance DAC with Differential LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference analog output, 50Ω double terminated (Figure 7), ...
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High Dynamic Performance DAC with Differential LVDS Inputs ELECTRICAL CHARACTERISTICS (continued) ( VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference analog output, 50Ω double terminated (Figure 7), ...
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High Dynamic Performance DAC with Differential LVDS Inputs ( VCLK = 3.3V, external reference SFDR vs. OUTPUT FREQUENCY (f = 300MHz -6dB FS) CLK OUT 100 ...
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High Dynamic Performance DAC with Differential LVDS Inputs PIN NAME 1 B1P Data Bit 1 2 B1N Complementary Data Bit 1 3 B0P Data Bit 0 4 B0N Complementary Data Bit 0 5–8, 23, N.C. No Connection. ...
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High Dynamic Performance DAC with Differential LVDS Inputs PIN NAME 45 B12N Complementary Data Bit 12 46 B11P Data Bit 11 47 B11N Complementary Data Bit 11 48 B10P Data Bit 10 49 B10N Complementary Data Bit ...
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High Dynamic Performance DAC with Differential LVDS Inputs DV DGND DD 1.2V REFERENCE REFIO FSADJ CLKN CLKP Figure 1. Simplified MAX5887 Block Diagram Table 1. I and R Selection Matrix Based on a Typical 1.200V Reference Voltage ...
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High Dynamic Performance DAC with Differential LVDS Inputs 1.2V REFERENCE 10kΩ REFIO 0.1µF FSADJ CURRENT-STEERING I REF R SET DACREF REF REFIO SET Figure 2. Reference Architecture, Internal Reference Configuration plane, IOUTP should ...
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High Dynamic Performance DAC with Differential LVDS Inputs B0 TO B13 SETUP CLKP IOUT Figure 5. Detailed Timing Relationship frequencies. Their differential characteristic supports the transmission of high-speed data patterns ...
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High Dynamic Performance DAC with Differential LVDS Inputs AV DD B0–B13 14 AGND Figure 7. Differential to Single-Ended Conversion Using a Wideband RF Transformer AV DV VCLK DD DD IOUTP B0–B13 MAX5887 IOUTN 14 AGND DGND CLKGND ...
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High Dynamic Performance DAC with Differential LVDS Inputs tiguous W-CDMA carriers spread their IM products over a bandwidth of 20MHz on either side of the 20MHz total carrier bandwidth. In this four-carrier scenario, only the energy in ...
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High Dynamic Performance DAC with Differential LVDS Inputs The noise density requirements (Table 2) for a GSM/EDGE-based system can again be derived from the system’s Tx mask. With a worst-case noise level of -80dBc at frequency offsets ...
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High Dynamic Performance DAC with Differential LVDS Inputs O MEASUREMENT BANDWIDTH -30 30kHz 100kHz -60 -70 -73 -75 -80 -90 0.2 0.4 0.6 1.2 1.8 FREQUENCY OFFSET FROM CARRIER (MHz) Figure 11. GSM/EDGE Tx Mask Requirements quency ...
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High Dynamic Performance DAC with Differential LVDS Inputs In this package, the data converter die is attached lead frame with the back of this frame exposed at the package bottom surface, facing the PC ...
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High Dynamic Performance DAC with Differential LVDS Inputs A gain error is the difference between the ideal and the actual full-scale output voltage on the transfer curve, after nullifying the offset error. This error alters the slope ...
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High Dynamic Performance DAC with Differential LVDS Inputs (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, (The package drawing(s) in this data sheet may not ...