MAX5318 MAXIM [Maxim Integrated Products], MAX5318 Datasheet - Page 36

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MAX5318

Manufacturer Part Number
MAX5318
Description
18-Bit, High-Accuracy Voltage Output DAC with Digital Gain, Offset Control, and SPI Interface
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
Table 19. General Configuration and Status Read Register (0xC)
Maxim Integrated
BIT
NAME
DEFAULT
11:6
BIT
5:2
1:0
17
16
15
14
13
12
18-Bit, High-Accuracy Voltage Output DAC with
Digital Gain, Offset Control, and SPI Interface
PD_SW
17
0
NO_HOLDEN
REV_ID[3:0]
DOUT_ON
NO_BUSY
RST_SW
PD_SW
NAME
BUSY
HOLDEN
NO_
16
0
Software PD (Power-Down). Equivalent to the PD input.
0: Normal mode.
1: Power-down mode. OUT is internally connected to AGND using a 2kI resistor.
SPI Bus Hold Enable.
0: Bus hold enabled for SPI DOUT output. DOUT stays at its final value after the SPI CS input
rises at the end of the SPI frame.
1: Bus hold disabled for SPI DOUT output. DOUT goes high impedance after the SPI CS
input rises at the end of the SPI frame.
Software Reset. Equivalent to the RST input.
0: Place device in reset.
1: Normal operation.
Set the active low RST_SW bit low to initiate a software reset (equivalent to pulling RST low).
BUSY Input Disable.
0: BUSY input is active.
1: BUSY input is disabled.
Note that this does not affect the BUSY bit in the General Configuration and Status Register.
The BUSY pin is bidirectional. When enabled, it can be pulled down externally to delay DAC
updates.
SPI DOUT Output Disable. DOUT is disabled by default.
0: DOUT output disabled. When DOUT is disabled, the output is pulled low for the duration
of the SPI frame.
1: DOUT output enabled.
Global BUSY status readback.
0: Device is busy calculating output voltage.
1: Device is not busy.
Reserved. Will read back 0.
Device revision
Reserved. Will read back 0.
RST_SW
15
1
NO_BUSY
14
0
DOUT_ON
13
0
BUSY
DESCRIPTION
12
0
11
X
0
10
X
0
X X X X
9 8 7
0 0 0
6
0
MAX5318
5
REV_ID[3:0]
4
0001
3
2
1
X
0
X
0
0
36

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