MAX5318 MAXIM [Maxim Integrated Products], MAX5318 Datasheet - Page 20

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MAX5318

Manufacturer Part Number
MAX5318
Description
18-Bit, High-Accuracy Voltage Output DAC with Digital Gain, Offset Control, and SPI Interface
Manufacturer
MAXIM [Maxim Integrated Products]
Datasheet
Maxim Integrated
PIN
1
2
3
4
18-Bit, High-Accuracy Voltage Output DAC with
READY
Digital Gain, Offset Control, and SPI Interface
NAME
BUSY
RST
M/Z
Active-Low Reset Input. Drive RST low to DGND to put the device into a reset state. A reset state sets all
SPI input registers to their default power-on reset states as defined by the state of inputs M/Z and TC/SB.
Set RST high to VDDIO, the DAC output remains at the state defined by M/Z until LDAC is taken low.
SPI Active-Low Ready Output. READY asserts low when the device successfully completes processing
an SPI data frame. READY asserts high at the next rising edge of CS. In daisy-chain applications, the
READY output typically drives the CS input of the next device in the chain or a GPIO of a microcontroller.
Reset Select Input. M/Z selects the default state of the analog output (OUT) after power-on or a hardware
or software reset. Connect M/Z to V
the default output voltage to zero scale.
Digital Input/Open-Drain Output. Connect a 2kI pullup resistor from BUSY to V
during the internal calculations of the DAC register data. During this time, the user can continue writing
new data to the DIN, OFFSET, and GAIN registers, but no further updates to the DAC register and
DAC output can take place. If LDAC is asserted low while BUSY is low, this event is stored. BUSY is
bidirectional, and can be asserted low externally to delay LDAC action. BUSY also goes low during
power-on reset, when RST is low, or when software reset is activated.
TOP VIEW
READY
TC/SB
DOUT
BUSY
LDAC
SCLK
AVSS
RST
M/Z
DIN
CS
PD
10
11
12
1
2
3
4
5
6
7
8
9
+
DDIO
MAX5318
TSSOP
to set the default output voltage to midscale or to DGND to set
FUNCTION
24
23
22
21
20
19
18
17
16
15
14
13
V DDIO
DGND
BYPASS
AVDD2
AGND_F
AGND_S
REF
REFO
RFB
OUT
AVDD1
AGND
Pin Configuration
DDIO
Pin Description
MAX5318
. BUSY goes low
20

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