AFE2126E BURR-BROWN [Burr-Brown Corporation], AFE2126E Datasheet
AFE2126E
Related parts for AFE2126E
AFE2126E Summary of contents
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For most current data sheet and other product information, visit www.burr-brown.com Dual HDSL /SDSL ANALOG FRONT END FEATURES SERIAL DIGITAL INTERFACE 48-LEAD SSOP PACKAGE E1, T1 AND SDSL OPERATION 64kbps TO 1168kbps OPERATION SCALEABLE DATA RATE 280mW POWER DISSIPATION ...
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... Loopback Disabled |I | < < – Specification Operating Range Specification Operating Range 3.3V AFE2126E MIN TYP MAX See Typical Performance Curves +18 6 Symbol Periods 5 %FSR 32 584 64 1168 kbits/sec 32 584 196 13 ...
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... PACKAGE AFE2126E SSOP-48 " " NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces of “AFE2126E/1K” will get a single 1000-piece Tape and Reel. BLOCK DIAGRAM 1/2 AFE2126 txbaudCLK tx48xCLK Data In ...
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PIN CONFIGURATION Top View Data OutA 1 2 rx48xCLKA rxbaudCLKA 3 Data InA 4 5 tx48xCLKA txbaudCLKA DGND AGND 9 txLINE txLINE–A 12 AFE2126 AGND 13 Channel A Channel B AV ...
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TYPICAL PERFORMANCE CURVES At Output of HDSL Pulse Transformer The curves shown below are measured at the line output of the HDSL transformer. Typical unless otherwise specified. –20 –40 –60 –80 –100 –120 CURVE 1. Upper ...
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THEORY OF OPERATION The AFE2126 has two HDSL Analog Front End (AFE) circuits on chip (channel A and channel B). Each AFE consists of a transmit and a receive channel which interfaces to a HDSL DSP through a six-wire serial ...
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Data is transmitted and received in synchronization with the 48x transmit and receive clocks (tx48xCLK and rx48xCLK). There are 48-bit times in each baud period. Data In is received in the first 16 bits of each baud period. The remaining ...
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BIT DESCRIPTION BIT STATE 15 (MSB) tx Enable Signal 0 AFE Transmits a 0 Symbol 1 AFE Transmits HDSL Symbol as defined by bits 14 and 13 14 and 13 tx Symbol 00 Definition ...
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REF P rxbaudCLK rx48xCLK 1/2 Data Out HDSL DSP AFE2126 txbaudCLK tx48xCLK Data In GNDA GNDA GNDA 3.3V Digital 0.1 F 0.1 F FIGURE 6. Basic Connection Diagram for Each Channel of the ...
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DISCUSSION OF SPECIFICATIONS UNCANCELED ECHO A key measure of transceiver performance is uncancelled echo. Uncancelled echo is the summation of all of the errors in the transmit and receive paths of the AFE2126. It includes effects of linearity, distortion, and ...
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LAYOUT The analog front end of an HDSL system has two conflicting requirements. It must accept and deliver moderately high rate digital signals and it must generate, drive, and convert precision analog signals. To achieve optimal system perfor- mance with ...