ISL33002 INTERSIL [Intersil Corporation], ISL33002 Datasheet

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ISL33002

Manufacturer Part Number
ISL33002
Description
I2C Bus Buffer with Rise Time Accelerators and Hot Swap Capability
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
I
Hot Swap Capability
ISL33001, ISL33002, ISL33003
The ISL33001, ISL33002, ISL33003 2-Channel Bus
Buffers provide the necessary buffering for extending the
bus capacitance beyond the 400pF maximum specified
by the I
ISL33002, ISL33003 feature rise time accelerator
circuitry to reduce power consumption from passive bus
pull-up resistors and improve data-rate performance. All
devices also include hot swap circuitry to prevent
corruption of the data and clock lines when I
are plugged into a live backplane and level translation for
mixed supply voltage applications.
The ISL33001, ISL33002, ISL33003 operates at supply
voltages from +2.3V to +5.5V at a temperature range of
-40°C to +85°C.
Summary of Features
Related Literature*
• AN1543, “ISL33001EVAL1Z, ISL33002EVAL1Z,
Typical Operating Circuit
ISL33001
ISL33002
ISL33003
NUMBER
September 30, 2010
FN7560.2
ISL33003EVAL1Z Evaluation Board Manual”
PART
2
C Bus Buffer with Rise Time Accelerators and
µC
SDA
SCL
EN
2
V
C specification. In addition, the ISL33001,
TRANSLATION
CC1
LEVEL
Yes
Yes
No
+3.3V
ISL33003
+5.0V
ENABLE
1
PIN
Yes
Yes
No
V
READY
(see page 15)
CC2
PIN
Yes
No
No
PLANE
BACK
1-888-INTERSIL or 1-888-468-3774
GND
SDA
SCL
ACCELERATOR
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
2
DISABLE
C devices
Yes
DEVICE
DEVICE
No
No
I
I
2
2
A
B
C
C
Features
• 2 Channel I
• +2.3VDC to +5.5VDC Supply Range
• >400kHz Operation
• Bus Capacitance Buffering
• Rise Time Accelerators
• Hot-Swapping Capability
• ±6kV Class 3 HBM ESD Protection On All Pins
• ±12kV HBM ESD Protection on SDA/SCL Pins
• Enable Pin (ISL33001 and ISL33003)
• Logic Level Translation (ISL33002 and ISL33003)
• READY Logic Pin (ISL33001)
• Accelerator Disable Pin (ISL33002)
• Pb-Free (RoHS Compliant) 8 Ld SOIC (ISL33001
• Low Quiescent Current . . . . . . . . . . . . . 2.2mA typ
• Low Shutdown Current . . . . . . . . . . . . . . 0.5µA typ
Applications*
• I
• Server Racks for Telecom, Datacom, and Computer
• Desktop Computers
• Hot-Swap Board Insertion and Bus Isolation
Bus Accelerator Performance
only), 8 Ld TDFN (3mmx3mm) and 8 Ld MSOP
packages
Servers
All other trademarks mentioned are the property of their respective owners.
2
C Bus Extender and Capacitance Buffering
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
100kHz I
2
2
AND 400pF BUS CAPACITANCE
Copyright Intersil Americas Inc. 2010. All Rights Reserved
C Compatible Bi-Directional Buffer
C BUS WITH 2.7kΩ PULL-UP RESISTOR
WITHOUT BUFFER
WITH BUFFER
TIME (2µs/DIV)
(see page 15)

Related parts for ISL33002

ISL33002 Summary of contents

Page 1

... C devices • ±12kV HBM ESD Protection on SDA/SCL Pins • Enable Pin (ISL33001 and ISL33003) • Logic Level Translation (ISL33002 and ISL33003) • READY Logic Pin (ISL33001) • Accelerator Disable Pin (ISL33002) • Pb-Free (RoHS Compliant SOIC (ISL33001 only TDFN (3mmx3mm) and 8 Ld MSOP ...

Page 2

... ISL33003IUZ 33003 ISL33001MSOPEVAL1Z ISL33001 Evaluation Board ISL33002MSOPEVAL1Z ISL33002 Evaluation Board ISL33003MSOPEVAL1Z ISL33003 Evaluation Board NOTES: 1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...

Page 3

... NAME NOTES V CC1 V ISL33002, ISL33003 CC2 GND EN ISL33001 ISL33003 READY ISL33001 only ACC ISL33002 only SDA_IN SDA_OUT SCL_IN SCL_OUT PAD Thermal Pad; TDFN only 3 ISL33001, ISL33002, ISL33003 (Continued CC1 SCL_OUT SDA_OUT 7 6 SDA_IN 5 ACC V 8 CC1 SDA_OUT 7 SCL_OUT SDA_IN ...

Page 4

... +2.3V to +5.5V CC1 CC1 CC2 CONDITIONS ISL33002 and ISL33003 V = 5.5V; ISL33001 only (Note 11) CC1 5.5V; ISL33002 and CC1 CC2 ISL33003 (Note 11 5.5V; ISL33002 and CC2 CC ISL33003 (Note 11 5.5V GND; ISL33001 only CC1 5.5V GND; CC1 CC2 EN ISL33003 only 5.5V GND, ...

Page 5

... V = 3.3V, INPUT CC2 ISL33002 and ISL33003 (Figure 2.7V 0V 3mA CC1 INPUT SINK on SDA/SCL pins 2.7V, CC2 ISL33002 and ISL33003 (Figure 4) (Figure 23) SDA and SCL pins = V = 5.5V; CC1 V = 5.5V, ISL33002 and ISL33003 CC2 = +2.3V to +5.5V, unless otherwise noted (Note 8). TEMP MIN MAX (°C) (Note 9) TYP (Note 9) UNITS ...

Page 6

... Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. 10. Typical value determined by design simulations. Parameter not tested. 11. Buffer is in the connected state. 12. ISL33002 and ISL33003 limits established by characterization. Not production tested. 6 ISL33001, ISL33002, ISL33003 = ...

Page 7

... SCL_IN GND 0V FIGURE 4A. TEST CIRCUIT 7 ISL33001, ISL33002, ISL33003 - V SDA_IN Logic High for t > Enable Delay, t prior to SCL_IN transition - Bus Idle Time Measured on ISL33001 only - ISL33002 and ISL33003 performance inferred from ISL33001 10kΩ SCL_IN OR 10kΩ SDA_OUT ...

Page 8

... I = CΔV/Δt ACC V CC1 2.7kΩ 100kΩ V CC1 SCL_OUT SCL_IN GND 2nF FIGURE 6. ACCELERATOR CURRENT TEST CIRCUIT 8 ISL33001, ISL33002, ISL33003 (Continued) SCL_IN OR 2.7kΩ 2.7kΩ SDA_OUT SCL_OUT OR SDA_IN SDA_OUT V IN 100pF *Propagation delay measured between 50 FIGURE 5. PROPAGATION DELAY 2.7kΩ 2.7kΩ ...

Page 9

... The ISL33001 features a logic output flag (READY) that signals the status of the buffer and an EN pin to enable or disable the buffer. The ISL33002 features two separate supply pins for voltage level shifting on the I/O pins and a logic input to disable the rise time accelerator circuitry. ...

Page 10

... Rise Time Accelerators The ISL33001, ISL33002, ISL33003 buffer rise time accelerators on the SDA/SCL pins improve the transient performance of the system. Heavy load capacitance or weak pull-up resistors on an Open-Drain bus cause the rise time to be excessively long, which leads to data errors or reduced data rate performance ...

Page 11

... For a bus that is operating normally without active rise time circuitry, using the ISL33001, ISL33002, ISL33003 buffer will allow larger pull-up resistor values to reduce sink currents when the bus is driving low. However, choose a pull-up resistor value of PLH no larger than 20kΩ ...

Page 12

... (mA) OL FIGURE 15. SDA/SCL OUTPUT LOW VOLTAGE vs SINK CURRENT ISL33001, ISL33002, ISL33003 10pF OUT Specified. (Continued -40° 4.5 5.0 5.5 6.0 FIGURE 12. I CC1 +25° ...

Page 13

... VCC (V) FIGURE 19. ACCELERATOR PULL-UP CURRENT +85° +25° -40° 2.0 2.5 3.0 3.5 4.0 V (V) CC FIGURE 21. PROPAGATION DELAY H ISL33001, ISL33002, ISL33003 10pF OUT Specified. (Continued) 100 FIGURE 18. INPUT TO OUTPUT OFFSET VOLTAGE vs 800 700 600 500 ...

Page 14

... Typical Performance Curves FIGURE 23. SDA/SCL PIN CAPACITANCE vs TEMPERATURE vs V Die Characteristics SUBSTRATE AND TDFN THERMAL PAD POTENTIAL (POWERED UP): GND PROCESS: 0.25µm CMOS 14 ISL33001, ISL33002, ISL33003 10pF OUT Specified. (Continued 2. 3. -30 - TEMPERATURE (°C) ...

Page 15

... To report errors or suggestions for this datasheet, please go to FITs are available from our website at 15 ISL33001, ISL33002, ISL33003 for a complete list of Intersil product families. ISL33001, ISL33002, ISL33003 www.intersil.com/askourstaff http://rel.intersil.com/reports/search.php CHANGE ” on page 4 for ISL33001 only from 2.2mA CC1 September 30, 2010 FN7560 ...

Page 16

... LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE (TDFN) Rev 0, 2/08 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW ( 2. . TYPICAL RECOMMENDED LAND PATTERN 16 ISL33001, ISL33002, ISL33003 A PIN #1 INDEX AREA 6 B 3.00 0 .80 MAX ( 1. 0. 0.25 ) NOTES: 1. Dimensions are in millimeters. Dimensions Dimensioning and tolerancing conform to AMSE Y14.5m-1994. ...

Page 17

... LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 4, 2/10 3.00 6 PIN 1 INDEX AREA (4X) 0.15 TOP VIEW 2X 1.950 PIN #1 1 INDEX AREA 0.30 ± 0.10 2.30 ±0.10 BOTTOM VIEW 17 ISL33001, ISL33002, ISL33003 A B (1.50) ( 2.90 ) PIN 1 6X 0.65 0.75 ±0.05 1.50 ±0. 0.30 ±0.05 0. NOTES: 1. Dimensions are in millimeters. Dimensions ...

Page 18

... M8.118 8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE Rev 3, 3/10 3.0±0. PIN TOP VIEW H 0.25 - 0.036 0. A-B D SIDE VIEW 1 (5.80) (4.40) (3.00) (0.65) TYPICAL RECOMMENDED LAND PATTERN 18 ISL33001, ISL33002, ISL33003 5 D 1.10 MAX 4.9±0.15 3.0±0.05 5 0.65 BSC 0.85±010 C SEATING PLANE 0.10 C 0.10 ± 0.05 NOTES (0.40) (1.40 SIDE VIEW 2 ...

Page 19

... No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see 19 ISL33001, ISL33002, ISL33003 M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE M ...

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