W83194BR-703 WINBOND [Winbond], W83194BR-703 Datasheet - Page 13

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W83194BR-703

Manufacturer Part Number
W83194BR-703
Description
STEPLESS CLOCK FOR SIS 741 CHIPSET
Manufacturer
WINBOND [Winbond]
Datasheet
7.3
7.4
7.5
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
Register 2: PCI, ZCLK Control (1 = Enable, 0 = Stopped) (Default: FFh)
Register 3: PCI, AGP Control (1 = Enable, 0 = Stopped) (Default: FFh)
Register 4: 48MHz, REF, SRC Control (1 = Enable, 0 = Stopped) (Default: FFh)
SEL12_48
PIN NO
PIN NO
PIN NO
47,46
26
27
15
14
10
23
22
21
20
17
16
47
46
30
31
4
3
2
9
-
-
-
PWD
PWD
PWD
1
1
1
1
1
1
1
1
X
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Reserved
PCI_F1 output control
PCI_F0 output control
ZCLK1 output control
ZCLK0 output control
PCI5 output control
PCI4 output control
PCI3 output control
PCI2 output control
PCI1 output control
PCI0 output control
12 _ 48 MHz output selection, 1: 12 MHz (default) 0: 48 MHz.
Default value follow hardware trapping data on SEL12_48# pin.
IOAPIC1 output control
IOAPIC0 output control
AGP_1 output control
AGP_0 output control
24_48MHz output control
12_48MHz output control
Reserved
REF2 output control
REF1 output control
REF0 output control
SRC output control
Reserved
W83194BR-703/W83194BG-703
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DESCRIPTION
DESCRIPTION
DESCRIPTION
Publication Release Date: Jan. 2006
Revision 0.8

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