PI6C39911-2J Pericom Semiconductor Corporation, PI6C39911-2J Datasheet - Page 5
![no-image](/images/no-image-200.jpg)
PI6C39911-2J
Manufacturer Part Number
PI6C39911-2J
Description
3.3V High Speed LVTTL or Balanced Output Programmable Skew Clock Buffer - SuperClock
Manufacturer
Pericom Semiconductor Corporation
Datasheet
1.PI6C39911-2J.pdf
(11 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C39911-2JEX
Manufacturer:
PERICOM
Quantity:
20 000
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Notes:
9.
10. t
11. t
12. C
13. There are three classes of outputs: Nominal (multiple of t
14. t
15. t
16. Specified with outputs loaded with 30pF for the PI6C39911 devices. Devices are terminated through 50 Ohm to V
17. t
18. t
Switching Characteristics
P
f
t
a
N
S
t
t
t
t
t
t
t
t
t
t
a r
t
S
S
S
S
S
O
R
K
O
t
O
O
R
t
L
t
SKEW is defined as the time between the earliest and the latest output transition among all outputs for which the same t
selected when all are loaded with 30pF and terminated with 50 ohms to V
and 4Qx only in Divide-by-2 or Divide-by-4 mode).
at 2.0V. t
operating limits. This parameter is measured from the application of a new signal or frequency at REF or FB until t
P
K
K
K
K
K
P
D
SKEWPR
SKEW0
DEV
ODCV
ORISE
LOCK
t
t
P
F
O
P
t
E
D
R
M
P
W
J
m
W
L
U
E
E
E
E
E
E
A
W
W
W
R
D
S I
C
C
(
W
W
W
W
W
V
= 0pF. For C
H
L
t e
L
, 1
K
H
V
L
P
E
L
0
1
2
3
4
is the output-to-output skew between any two devices operating under the same conditions (V
) 2
R
r e
is the time that is required before synchronization is achieved. This specification is valid only after V
is the deviation of the output from a 50% duty cycle. Output pulse width variations are included in t
and t
is defined as the skew between outputs when they are selected for 0t
PWL
is defined as the skew between a pair of outputs (XQ0 and XQ1) when all eight outputs are selected for 0t
O
C
P -
O
a S
O
O
O
O
O
O
O
O
C
O
F
n i
R
R
r P
e Z
e Z
i D
D
D
r P
P
D
e r
L
o l
E
E
c y
p
u
u
u
u
i v i
e
u
u
u
u
u
u
OFALL
g o
r i a
e f f
p o
M
m
o r
o r
i v i
p t
p t
p t
p t
i v
p t
p t
p t
p t
p t
L
p t
r e
F
F
k c
u q
is measured at 0.8V.
e d
- e l
e
e c
H
a r
e d
t u
t u
t u
e r
t u
g a
t u
t u
t u
t u
t u
t u
i t a
L
P
P
L
O
S
O
n e
C
- d
z
o
o t
u
u
m
t n
t -
e k
= 30pF, t
- d
i t a
g n
u
u
S
S
S
S
D
H
L
R
F
t i J
k c
e s l
e s l
a l
y c
m
measured between 0.8V and 2.0V.
p t
p t
- o
c -
n I
e k
e k
e k
e k
O
l l a
e s i
u
G I
w
D
C
n o
s s
r e t
b a
y t
t u
t u
e v
c y
D
W
T
i v i
a l
W
W
w
w
w
w
H
X (
T
m i
O
e l
e
T
D
s s
e t r
C
e l
M
S
m i
e d
d i
d i
i v
R (
R (
R (
R (
m i
T
t u
T
e
e
Q
e k
c y
S
m i
h t
h t
t a
e c
) d
e
SKEW0
O
a l
m i
1 (
D
) d
u p
e
e s i
s i
e s i
s i
e k
, 0
(
w
e l
h c
, y
(
6 1
t u
) 8
e
s e
9 (
- e
- e
e
6 1
H
L
9 (
F
F
F
) s t
S
(Over the Operating Range)
w
R -
R -
X
O
u p
1 ,
1 ,
d e
A (
V
D
G I
1 ,
S
S
S
R
D
a F
a F
e k
1 ,
r c
Q
9 (
) 3
i r a
) 7
W
) 3
E
e
U
s i
s i
e
) 7
) s t
=
=
=
l l
p i
H
w
i v
= 0.35ns.
1 ,
, l l
, l l
F
i v
) 1
, e
, e
t i n
e P
i t a
O
i t a
i t
) 3
9 (
L
M
H
i t a
8 (
9 (
R
N
N
n o
O
a F
a F
n o
t u
1 ,
k a
G I
D I
n o
1 ,
e s i
1 ,
n o
o
o
) 3
R
W
u p
) 4
) 0
- l l
m
- l l
m
t -
H
1 (
(
M
f
, 1
- o
(
n i
n i
o t
f
) s t
a F
a F
o r
(
, 1
o r
) 5
, 1
) 2
S
- l a
- l a
) 2
e p
m
) 2
9 (
F
m
(
, l l
, l l
) 8
1 ,
n I
D
B
k a
0 5
0 5
) 1
i v i
e v
R
(
%
) 8
%
e d
e s i
e t r
1 (
1 (
, d
, d
) 6
) 6
U
delay), Inverted (4Q0 and 4Q1 only with 4F0 = 4F1 = HIGH), and Divided (3Qx
(2,7)
M
0 –
1 –
. 0
. 0
2 1
3
3
0 4
5 2
0 .
0 .
5 1
5 1
. n i
3 .
0 .
P
5 .
S
6 I
e e
5
C
T
. 0
0
0
0
0
0
0
3
0
1
1
T
y
0 2
4 .
6 .
4 .
5 .
0 .
0 .
9 9
1 .
0 .
0 .
b a
. p
Programmable Skew Clock Buffer - SuperClock
1 1
e l
CC
M
2 -
1
+
+
. 0
. 0
1
2
0
0
0
0
1
2
3
1
1
0
/2.
0 3
0 5
5 2
0
1
0 0
3 3
a
5 .
8 .
5 .
8 .
5 .
0 .
5 .
3.3V High Speed LVTTL or Balanced Output
5 2
5 2
0 .
5 .
5 .
3 .
0 .
. x
U
. Other outputs are divided or inverted but not shifted.
M
0 –
1 –
2 1
. 0
. 0
3
3
5 2
0 4
0 .
0 .
5 1
5 1
. n i
5 .
0 .
5 .
P
S
6 I
e e
C
T
. 0
3
0
0
0
0
0
0
0
1
1
T
y
6 .
5 .
5 .
5 .
0 .
0 .
9 9
1 .
5 2
0 .
0 .
b a
. p
1 1
e l
CC
M
5 -
1
+
+
. 0
. 1
2
1
0
0
0
2
3
0
1
1
1
1
0 3
0 5
5 2
0
1
3 3
0 0
ambient temperature, air flow, etc.)
a
5 2
5 .
7 .
0 .
7 .
0 .
5 .
0 .
5 .
5 .
5 .
5 2
5 .
0 .
SKEW2
. x
CC
M
0 –
1 –
. 0
. 0
2 1
3
3
0 4
5 2
PD
is stable and within normal
and t
0 .
0 .
5 1
5 1
. n i
7 .
2 .
5 .
P
S
is within specified limits.
CC
6 I
e e
SKEW4
C
T
/2. t
T
0
0
0
1
0
1
0
0
1
1
U
y
3
3 .
6 .
7 .
0 .
0 .
b a
1 .
0 .
2 .
0 .
0 .
. p
.
PS8497E
9 9
PWH
U
e l
1 1
delay has been
specifications.
PI6C39911
M
1
+
+
. 0
. 0
. 1
2
1
3
3
0
1
1
1
1
1
1
0 3
0 5
5 2
is measured
0
1
0 0
a
3 3
5 2
5 7
0 .
5 .
5 .
0 .
5 .
2 .
7 .
5 6
5 .
5 .
7 .
2 .
. x
09/13/02
U
M
m
s n
s n
s p
n
s
H
- t i
s
z