PI6C39911-2J Pericom Semiconductor Corporation, PI6C39911-2J Datasheet - Page 3
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PI6C39911-2J
Manufacturer Part Number
PI6C39911-2J
Description
3.3V High Speed LVTTL or Balanced Output Programmable Skew Clock Buffer - SuperClock
Manufacturer
Pericom Semiconductor Corporation
Datasheet
1.PI6C39911-2J.pdf
(11 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PI6C39911-2JEX
Manufacturer:
PERICOM
Quantity:
20 000
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Note:
3. FB connected to an output selected for “zero” skew (i.e., xF1 = xF0 = MID)
Test Mode
The TEST input is a three-level input. In normal system operation,
this pin is connected to ground, allowing the PI6C39911 to operate
as explained briefly above (for testing purposes, any of the three
level inputs can have a removable jumper to ground, or be tied LOW
through a 100 Ohm resistor. This will allow an external tester to
change the state of these pins.)
If the TEST input is forced to its MID or HIGH state, the device will
operate with its internal phase locked loop disconnected, and input
levels supplied to REF will directly control all outputs. Relative
output to output functions are the same as in normal mode.
In contrast with normal operation (TEST tied LOW). All outputs
will function based only on the connection of their own function
select inputs (xF0 and xF1) and the waveform characteristics of the
REF input.
Operating Range
C
n I
o
R
m
u d
a
m
n
r t s
e
e g
c r
l a i
l a i
(N/A)
(N/A)
1Fx
2Fx
(N/A) LL/HH Divided
(N/A)
MM
A
MH
HM
HH
LH
LM
ML
HL
LL
m
–
b
0 4
0
e i
C °
(N/A)
(N/A)
t n
C °
3Fx
4Fx
MH
HM
Figure 1. Typical Outputs with FB Connected to a Zero-Skew Output
(N/A)
(N/A)
LM
ML
MM
LH
HL
HH
o t
e T
REF Input
o t
FB Input
+
m
+
0 7
e p
5 8
Invert
–6t
–4t
–3t
–2t
–1t
+1t
+2t
+3t
+4t
+6t
C °
a r
0t
C °
U
U
U
U
U
U
U
U
U
U
U
u t
e r
3
3
3 .
3 .
V
V
V
C
±
±
C
0 1
0 1
%
%
3
Maximum Ratings
Storage Temperature ..................................... –65°C to +150°C
Ambient Temperature with
Power Applied ............................................... –55°C to +125°C
Supply Voltage to Ground Potential ................ –0.5V to +5.0V
DC Input Voltage .............................................. –0.5V to +5.0V
Output Current into Outputs (LOW) .............................. 64mA
Static Discharge Voltage ............................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current ......................................................... >200mA
Maximum Power Dissipation at T
Programmable Skew Clock Buffer - SuperClock
3.3V High Speed LVTTL or Balanced Output
(3)
A
=85°C
(2,3) ..............
PS8497E
PI6C39911
0.80watts
09/13/02