AM186ER-25KCW AMD [Advanced Micro Devices], AM186ER-25KCW Datasheet
AM186ER-25KCW
Related parts for AM186ER-25KCW
AM186ER-25KCW Summary of contents
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... ™ microcontrollers and microprocessors based on the x86 architecture. The Am186ER and Am188ER microcontrollers are the ideal upgrade for designs ...
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Am186™ER MICROCONTROLLER BLOCK DIAGRAM INT2/INTA0 INT3/INTA1/IRQ CLKOUTA INT4 CLKOUTB X2 X1 Clock and Interrupt Power Control Unit Management V CC Unit Watchdog GND Timer (WDT) Control Control Registers Registers RES Control Refresh Registers Control ARDY Unit SRDY S2 S1/IMDIS S0/SREN ...
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Am188™ER MICROCONTROLLER BLOCK DIAGRAM INT2/INTA0 INT3/INTA1/IRQ CLKOUTA INT4 CLKOUTB X2 X1 Clock and Power Interrupt Management Control Unit V CC Watchdog GND Timer (WDT) Control Control Registers Registers RES Control Refresh Registers Control ARDY Unit SRDY S2 S1/IMDIS S0/SREN Bus ...
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... SPEED OPTION – MHz – MHz – MHz – MHz DEVICE NUMBER/DESCRIPTION Am186ER = High-Performance, 80C186-Compatible, 16-Bit Embedded Microcontroller with RAM Am188ER = High-Performance, 80C188-Compatible, 16-Bit Embedded Microcontroller with RAM Valid combinations list configurations planned to be supported in volume for this device. Consult the ...
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TABLE OF CONTENTS Distinctive Characteristics ............................................................................................................ 1 General Description ..................................................................................................................... 1 Am186™ER Microcontroller Block Diagram ................................................................................ 2 Am188™ER Microcontroller Block Diagram ................................................................................ 3 Ordering Information .................................................................................................................... 4 List of Figures .............................................................................................................................. 9 List of Tables ............................................................................................................................... 9 Revision History ......................................................................................................................... ...
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LCS/ONCE0 ................................................................................................................... 33 MCS3/RFSH/PIO25 ....................................................................................................... 33 MCS2–MCS0 (MCS2/PIO24, MCS1/PIO15, MCS0/PIO14) .......................................... 34 NMI ................................................................................................................................ 34 PCS3–PCS0 (PCS3/PIO19, PCS2/PIO18, PCS1/PIO17, PCS0/PIO16) ...................... 34 PCS5/A1/PIO3 ............................................................................................................... 34 PCS6/A2/PIO2 ............................................................................................................... 34 PIO31–PIO0 (Shared) .................................................................................................... 35 RD .................................................................................................................................. 35 RES ................................................................................................................................ 35 RFSH2/ADEN (Am188™ER ...
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Chip-Select Unit ......................................................................................................................... 49 Chip-Select Timing ......................................................................................................... 49 Ready and Wait-State Programming ............................................................................. 49 Memory Maps ................................................................................................................ 50 Chip-Select Overlap ....................................................................................................... 51 Upper Memory Chip Select ............................................................................................ 51 Low Memory Chip Select ............................................................................................... 51 Midrange Memory Chip Selects ..................................................................................... 51 ...
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Switching Characteristics over Commercial and Industrial Operating Ranges, Internal RAM Show Read Cycle (40 MHz and 50 MHz) ................................................ 76 Internal RAM Show Read Cycle Waveform ................................................................... 77 Switching Characteristics over Commercial and Industrial Operating Ranges, PSRAM Read Cycle (25 ...
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... Bus Cycle Encoding ............................................................................................... 37 Table 6. Clocking Modes ..................................................................................................... 39 Table 7. Segment Register Selection Rules ........................................................................ 40 Table 8. Maximum and Minimum Clock Frequencies .......................................................... 44 Table 9. Am186ER Microcontroller Maximum DMA Transfer Rates .................................. 55 Table 10. Thermal Characteristics ( C/Watt) ......................................................................... 61 Table 11. Typical Power Consumption Calculation ............................................................... 62 Table 12. Junction Temperature Calculation ......................................................................... 62 Table 13. Typical Ambient Temperatures for PQFP with Two-Layer Board .......................... 63 Table 14 ...
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REVISION HISTORY Date Rev Description Replaced block diagrams on page 2 and page 3 with updated diagrams showing that the internal data Feb. 2000 D bus interfaces via the BIU and not RAM. Feb. 2000 D Added new industrial parts ...
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Date Rev Description Under “SRDY/PIO6” on page 38, the following sentence was added: "When SRDY is configured as May 2000 D P106, the internal SRDY signal is driven Low." In Table 8, “Maximum and Minimum Clock Frequencies,” on page 44, ...
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... Microcontroller ÉlanSC400 Microcontroller ÉlanSC410 Microcontroller Am186CC Communications Controller Am186ES and Am188ES Microcontrollers Am186ESLV & Am188ESLV Microcontrollers TM ER and Am188 ER Microcontrollers Data Sheet Am186ED Microcontroller Am186ER and Am188ER Microcontrollers Am186EDLV Microcontroller — Microprocessors — 16- and 32-bit microcontrollers — 16-bit microcontrollers ...
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... The Advantages of Integrated RAM Technical Bul- letin (Available only at www.amd.com/products/ epd/techdocs.) A full description of the Am186ER and Am188ER mi- crocontrollers’ registers and instructions is included in the Am186ER and Am188ER Microcontrollers User’s Manual listed above. To order literature, contact the nearest AMD sales of- fice or call the literature center at one of the numbers listed on the back cover of this manual ...
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... Both multiplexed and nonmultiplexed address buses are available on the Am186ER and Am188ER microcontrollers. The nonmultiplexed address bus eliminates system-support logic ordinarily needed to interface with external memory devices, while the mul- ...
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... Am186ER microcontroller. Figure 2 shows a compara- ble system implementation with an 80C186 microcon- troller. Because of its superior integration, the Am186ER system does not require the support devices required on the 80C186 example system. In addition, the Am186ER microcontroller provides significantly better performance with its 50-MHz clock rate. ...
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... AD14 16 AD7 17 AD15 18 19 S6/CLKSEL1 20 UZI/CLKSEL2 TXD 21 RXD 22 SDATA 23 SDEN1 24 SDEN0 25 Notes: Pin 1 is marked for orientation Am186 Am186ER Microcontroller TM ER and Am188 ER Microcontrollers Data Sheet 75 INT4 74 MCS1 73 MCS0 72 DEN 71 DT/R 70 NMI 69 SRDY 68 HOLD 67 HLDA 66 WLB 65 WHB 64 GND 63 ...
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TQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Number) Pin No. Name Pin No. Name 1 AD0 2 AD8 3 AD1 4 AD9 5 AD2 6 AD10 7 AD3 8 AD11 9 AD4 10 AD12 11 AD5 12 GND 13 AD13 ...
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TQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Name) Pin Name No. Pin Name A0 63 AD5 A1 62 AD6 A2 60 AD7 A3 59 AD8 A4 58 AD9 A5 57 AD10 A6 56 AD11 A7 55 AD12 A8 54 AD13 ...
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TQFP CONNECTION DIAGRAM AND PINOUTS—Am188™ER MICROCONTROLLER Top Side View—100-Pin Thin Quad Flat Pack (TQFP) AD0 1 AO8 2 AD1 3 AO9 4 AD2 5 AO10 6 AD3 7 AO11 8 AD4 9 AO12 10 AD5 11 GND 12 AO13 13 ...
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TQFP PIN ASSIGNMENTS—Am188™ER MICROCONTROLLER (Sorted by Pin Number) Pin No. Name Pin No. Name 1 AD0 2 AO8 3 AD1 4 AO9 5 AD2 6 AO10 7 AD3 8 AO11 9 AD4 10 AO12 11 AD5 12 GND 13 AO13 ...
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TQFP PIN ASSIGNMENTS—Am188™ER MICROCONTROLLER (Sorted by Pin Name) Pin Name No. Pin Name A0 63 AD5 A1 62 AD6 A2 60 AD7 A3 59 ALE A4 58 AO8 A5 57 AO9 A6 56 AO10 A7 55 AO11 A8 54 AO12 ...
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... A19 20 A18 A17 23 A16 24 A15 25 A14 26 A13 27 A12 28 A11 29 A10 30 A9 Notes: Pin 1 is marked for orientation Am186 Am186ER Microcontroller TM ER and Am188 ER Microcontrollers Data Sheet 80 AD1 79 AD8 78 AD0 77 DRQ0 76 DRQ1 75 TMRIN0 74 TMROUT0 73 TMROUT1 72 TMRIN1 71 RES 70 GND 69 MCS3/RFSH 68 ...
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PQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Number) Pin No. Name Pin No. Name 1 SDEN1/PIO23 26 2 SDEN0/PIO22 27 3 SCLK/PIO20 28 4 BHE/ADEN ALE 32 8 ARDY ...
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PQFP PIN ASSIGNMENTS—Am186™ER MICROCONTROLLER (Sorted by Pin Name) Pin Name No. Pin Name A0 40 AD5 A1 39 AD6 A2 37 AD7 A3 36 AD8 A4 35 AD9 A5 34 AD10 A6 33 AD11 A7 32 AD12 A8 31 AD13 ...
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PQFP CONNECTION DIAGRAM AND PINOUTS—Am188™ER MICROCONTROLLER Top Side View—100-Pin Plastic Quad Flat Pack (PQFP) 1 SDEN1 2 SDEN0 3 SCLK 4 RFSH2/ADEN ALE 7 8 ARDY S1/IMDIS S0/SREN 11 12 GND 13 X1 ...
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PQFP PIN ASSIGNMENTS—Am188™ER MICROCONTROLLER (Sorted by Pin Number) Pin No. Name Pin No. Name 1 SDEN1/PIO23 26 2 SDEN0/PIO22 27 3 SCLK/PIO20 28 4 RFSH2/ADEN ALE 32 8 ARDY ...
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PQFP PIN ASSIGNMENTS—Am188™ER MICROCONTROLLER (Sorted by Pin Name) Pin Name No. Pin Name A0 40 AD5 A1 39 AD6 A2 37 AD7 A3 36 ALE A4 35 AO8 A5 34 AO9 A6 33 AO10 A7 32 AO11 A8 31 AO12 ...
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LOGIC SYMBOL—Am186™ER MICROCONTROLLER Clocks 20 * Address and 16 Address/Data Buses * * Bus Control * * * * * Timer Control * * 32 shared Programmable ** I/O Control Notes: * These signals are the normal function of a ...
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LOGIC SYMBOL—Am188™ER MICROCONTROLLER Clocks * 20 8 Address and Address/Data Buses S1/IMDIS Bus Control * * * * * Timer Control * * 32 shared Programmable ** I/O Control Notes: * These signals are the normal function ...
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... S0/SREN, S6/CLKSEL1, and UZI/CLKSEL2. Emulators require that S6/CLKSEL1 and UZI/ CLKSEL2 be configured in their normal functionality, that is and UZI. If BHE/ADEN (on the Am186ER microcontroller) or RFSH2/ADEN (on the Am188ER microcontroller) is held Low during the rising edge of RES, S6 and UZI are configured in their normal func- tionality and cannot be programmed as PIOs. A19– ...
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... BHE does not need to be latched BHE is three-stated during bus hold and reset condi- tions. On the Am186ER microcontroller, WLB and WHB im- plement the functionality of BHE and AD0 for high and low byte write enables. Table 2. Data Byte Encoding BHE AD0 Type of Bus Cycle ...
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... DMA transfer begins, the HOLD latency can be as great as four bus cycles. This occurs if a DMA word transfer operation is taking place (Am186ER microcontroller only) from an odd address to an odd address. This is a total of 16 clock cycles or more if wait states are required. In addition, if locked transfers are performed, the HOLD latency time is in- creased by the length of the locked transfer ...
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INT2/INTA0/PIO31 Maskable Interrupt Request 2 (input, asynchronous) Interrupt Acknowledge 0 (output, synchronous) INT2—This pin indicates to the microcontroller that an interrupt request has occurred. If the INT2 pin is not masked, the microcontroller transfers program execu- tion to the location ...
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... PCS3–PCS0 are held High during a bus hold condition. They are also held High during reset. PCS4 is not available on the Am186ER and Am188ER microcontrollers. Unlike the UCS/LCS chip selects, the PCS outputs as- sert with the multiplexed AD address bus. Note also ...
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... I/O pins. Each PIO can be programmed with the following attributes: PIO func- tion (enabled/disabled), direction (input/output), and weak pullup or pulldown. On the Am186ER and Am188ER microcontrollers, the internal pullup resistor has a value of approximately 100 kohms. The internal pulldown resistor has a value of approximately 100 kohms. ...
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... S2–S0, RES, NMI, CLKOUTA, BHE, ALE, AD15–AD0, and A16–A0.) 2. These pins revert to normal operation if BHE/ADEN (Am186ER microcontroller) or RFSH2/ADEN (Am188ER microcontroller) is held Low during power-on reset. 3. When used as a PIO, input with pullup option available. 4. When used as a PIO, input with pulldown option available. ...
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... DMA-initiated bus cycle. During a bus hold or reset condition three-stated. TM Am186 CLKSEL1—The clocking mode of the Am186ER and Am188ER microcontrollers is controlled by UZI/ CLKSEL2/PIO26 and S6/CLKSEL1/PIO29. Both CLKSEL2 and CLKSEL1 are held High during power- on reset because of an internal pullup resistor. This is the default clocking mode— ...
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... UZI/CLKSEL2 is three-stated during bus holds and ONCE mode. CLKSEL2—The clocking mode of the Am186ER and Am188ER microcontrollers is controlled by UZI/ CLKSEL2/PIO26 and S6/CLKSEL1/PIO29 during re- set. Both CLKSEL2 and CLKSEL1 are held High during power-on reset because of an internal pullup resistor. This is the default clocking mode— ...
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... This pin and the X1 pin provide connections for a fun- damental mode crystal used by the internal oscillator circuit. If providing an external clock source, connect the source to X1 and leave X2 unconnected. Unlike the rest of the pins on the Am186ER and Am188ER micro- controllers not 5-V tolerant and Am188 ER Microcontrollers Data Sheet ...
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... The Am186ER and Am188ER microcontrollers are backward compatible with the 80C186/80C188 and Am186/Am188 micro- controllers. A full description of the Am186ER and Am188ER mi- crocontrollers’ registers and instructions is included in the Am186ER and Am188ER Microcontrollers User’s Manual , order #21684. ...
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... Figure 4 on page 42 shows the affected signals during a normal read or write operation for an Am186ER mi- crocontroller. The address and data will be multiplexed onto the AD bus. Figure 5 on page 42 shows an Am186ER microcontrol- ler bus cycle when address bus disable is in effect ...
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CLKOUTA A19–A0 AD15–AD0 (Read) AD15–AD0 (Write) LCS or UCS MCSx, PCSx Figure 4. Am186™ER Microcontroller Address Bus—Normal Operation CLKOUTA A19–A0 AD7–AD0 (Read) AD15–AD8 (Read) AD15–AD0 (Write) LCS or UCS Figure 5. Am186™ER Microcontroller—Address Bus Disable in Effect TM 42 Am186 ...
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Address Phase CLKOUTA A19–A0 AD7–AD0 Address (Read) AO15–AO8 (Read or Write) AD7–AD0 Address (Write) LCS or UCS MCSx, PCSx Figure 6. Am188™ER Microcontroller Address Bus—Normal Operation t Address Phase CLKOUTA A19–A0 AD7–AD0 (Read) AO15–AO8 AD7–AD0 (Write) LCS or ...
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... Phase-Locked Loop (PLL traditional 80C186/80C188 design, the internal clock frequency is half the frequency of the crystal. Because of the internal PLL on the Am186ER and Am188ER micro- controllers, the internal clock generated by both micro- controllers can operate four times the frequency of the crystal. The Am186ER and Am188ER microcon- trollers operate in the following modes: n Divide by Two— ...
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... Crystal-Driven Clock Source The internal oscillator circuit of the Am186ER and Am188ER microcontrollers is designed to function with a parallel-resonant fundamental mode crystal. Be- cause of the PLL, the crystal frequency can be twice, equal to, or one quarter of the processor frequency. Do not replace a crystal with equivalent. See Figure 8 for a diagram of oscillator configurations ...
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... Serial Port Control Register TM ER and Am188 ER Microcontrollers Data Sheet Note: Gaps in offset addresses indicate reserved registers. No access should be made to reserved registers. Changed from original Am186 microcontroller * w Changed from Am186EM and Am188EM microcontrollers ** New to the Am186ER and Am188ER microcontrollers ...
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Offset Register Name (Hexadecimal) w PIO Data 1 Register 7A PIO Direction 1 Register 78 PIO Mode 1 Register 76 PIO Data 0 Register 74 PIO Direction 0 Register 72 PIO Mode 0 Register 70 w Timer 2 Mode/Control Register ...
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... Processor initialization or startup is accomplished by driving the RES input pin Low. RES must be held Low for 1 ms during power-up to ensure proper device ini- tialization. RES forces the Am186ER and Am188ER microcontrollers to terminate all execution and local bus activity. No instruction or bus activity occurs as long ...
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... Ready and Wait-State Programming The Am186ER and Am188ER microcontrollers can be programmed to sense a ready signal for each of the ex- ternal peripheral or memory chip-select lines. The ex- ternal ready signal can be either the ARDY or SRDY signal as shown in Figure 11 ...
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... Memory Maps There are several possible ways to configure the ad- dress space of the Am186ER and Am188ER microcon- 1 Mbyte External Flash External Flash (UCS) 512 Kbytes External RAM 32 Kbytes Internal RAM Internal RAM 0 Kbyte 512 Kbytes Flash 256 Kbytes Flash Internal RAM External RAM ...
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... LCS pin has tradition- ally been used to control data memory. The LCS pin is not active on reset. The Am186ER and Am188ER mi- crocontrollers also allow the IMCS Register and inter- nal memory to be programmed to address 0. This would allow the internal memory to be used for the in- terrupt vector table and data memory ...
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... The internal RAM for the Am186ER microcontroller is a 16K x 16-bit-wide array (32 Kbyte) which provides the same performance as 16-bit external zero-wait-state RAM. For the Am188ER microcontroller, the internal ...
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... HOLD latency can be as great as four bus cycles. This occurs if a DMA word transfer operation is taking place from an odd address to an odd address (Am186ER microcontroller only). This is a total more clock cycles if wait states are required. In addition, if locked transfers are performed, the HOLD latency time is increased by the length of the locked transfer ...
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... DIRECT MEMORY ACCESS Direct memory access (DMA) permits transfer of data between memory and peripherals without CPU involve- ment. The DMA unit in the Am186ER and Am188ER microcontrollers, shown in Figure 13, provides two high-speed DMA channels. Data transfers can occur between memory and I/O spaces (e.g., memory to I/O) or within the same space (e ...
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... Each DMA control register determines the mode of op- eration for the particular DMA channel. This register specifies the following: n Mode of synchronization n Whether bytes or words are transferred (Am186ER microcontroller only) n Whether an interrupt is generated after the last transfer n Whether DMA activity ceases after a programmed ...
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... This four-pin interface permits half-duplex, bidirectional data transfer at speeds Mbit/s. Unlike the asynchronous serial port, the SSI operates in a master/slave configuration. The Am186ER and Am188ER microcontrollers are the master ports. The SSI interface provides four pins for communicating with system components: two enables (SDEN0 and SDEN1), a clock (SCLK), and a data pin (SDATA) ...
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... PROGRAMMABLE I/O (PIO) PINS There are 32 pins on the Am186ER and Am188ER mi- crocontrollers that are available as multipurpose sig- nals. Table 3 and Table 4 on page 36 list the PIO pins. Each of these pins can be used as a user-programma- ble input or output signal if the normal shared function is not needed ...
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PB=0 PB=1 PB=0 DR/DT=0 DR/DT=0 DR/DT=1 SDEN1 or SDEN0 SCLK SDATA Poll SSS for PB=0 Write to SSD Write to SSC, bit DE=1 Figure 14. Synchronous Serial Interface Multiple Write PB=0 PB=0 PB=1 DR/DT=1 DR/DT=0 DR/DT=0 SDEN1 or SDEN0 SCLK ...
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... The choice of a mixed voltage system design also involves balancing design complexity with the need for the additional features. Input/Output Circuitry To accommodate current 5-V systems, the Am186ER and Am188ER microcontrollers have 5-V tolerant I/O drivers. The drivers produce TTL-compatible drive out- put (minimum 2.4-V logic High) and receive TTL and CMOS levels ( ...
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... MHz ............................. 3 2.6 V Where Notes: Operating Ranges define those limits between which the functionality of the device is guaranteed. * Industrial versions of Am186ER and Am188ER microcon- trollers are available in 25- and 33-MHz operating frequen- cies only. Notes –1 Note 8 Note 1 ...
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... TM ER and Am188 ER Microcontrollers Data Sheet ) for the Am186ER and Am188ER ...
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... Typical Ambient Temperatures The typical ambient temperature specifications are based on the following assumptions and calculations: The commercial operating range of the Am186ER and Am188ER microcontrollers is a case temperature 100 degrees Centigrade measured at the top C center of the package. An increase in the ambient temperature causes a proportional increase in T The 50-MHz microcontroller is specified as 3 ...
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Table 13 shows typical maximum ambient temperatures in degrees Centigrade for a PQFP package used with a 2-layer board. The typical ambient temperatures are based on a 100-degree Centigrade maximum case temperature. Figure 18 illustrates the typical temperatures in Table ...
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Table 14 shows typical maximum ambient temperatures in degrees Centigrade for a TQFP package used with a 2-layer board. The typical ambient temperatures are based on a 100-degree Centigrade maximum case temperature. Figure 19 illustrates the typical temperatures in Table ...
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Table 15 shows typical maximum ambient temperatures in degrees Centigrade for a PQFP package used with a 4-layer to 6-layer board. The typical ambient temperatures are based on a 100-degree Centigrade maximum case temperature. Figure 20 illustrates the typical temperatures ...
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Table 16 shows typical maximum ambient temperatures in degrees Centigrade for a TQFP package used with a 4-layer to 6-layer board. The typical ambient temperatures are based on a 100-degree Centigrade maximum case temperature. Figure 21 illustrates the typical temperatures ...
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COMMERCIAL AND INDUSTRIAL SWITCHING CHARACTERISTICS AND WAVEFORMS In the switching waveforms that follow, several abbreviations are used to indicate the specific periods of a bus cycle. These periods are referred to as time states. A typical bus cycle is composed ...
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Alphabetical Key to Switching Parameter Symbols Parameter Symbol No. Description t 49 ARDY Resolution Transition Setup Time ARYCH t 51 ARDY Inactive Holding Time ARYCHL t 52 ARDY Setup Time ARYLCL Address Valid to WHB, WLB Low ...
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Numerical Key to Switching Parameter Symbols Parameter Number Symbol Description 1 t Data in Setup DVCL 2 t Data in Hold CLDX 3 t Status Active Delay CHSV 4 t Status Inactive Delay CLSH Address Valid Delay ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Read Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Requirements 1 t Data in Setup DVCL ( Data in Hold CLDX General Timing Responses 3 t ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Read Cycle (40 MHz and 50 MHz) Parameter No. Symbol Description General Timing Requirements 1 t Data in Setup DVCL ( Data in Hold CLDX General Timing Responses 3 t ...
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... AD15–AD0*, AD7–AD0** AO15–AO8 ALE RD 5 BHE* 67 LCS, UCS 16 MCS1–MCS0, PCS6–PCS5, PCS3–PCS0 DEN 19 DT/R 22 S2–S0 3 UZI Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM 72 Am186 Address 14 7 Address Address BHE 13 ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Write Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Responses 3 t Status Active Delay CHSV 4 t Status Inactive Delay CLSH Address Valid Delay ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Write Cycle (40 MHz and 50 MHz) Parameter No. Symbol Description General Timing Responses 3 t Status Active Delay CHSV 4 t Status Inactive Delay CLSH Address Valid Delay ...
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... AD7–AD0** AO15–AO8 ALE WR 20 WHB*, WLB WB 5 BHE* 67 LCS, UCS 16 MCS3–MCS0, PCS6–PCS5, PCS3–PCS0 DEN DT/R S2–S0 3 UZI Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM Am186 Address 14 7 Address Address BHE Status 7 ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Internal RAM Show Read Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Responses Address Valid Delay CLAV t 7 Data Valid Delay CLDV t 9 ...
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Internal RAM Show Read Cycle Waveform CLKOUTA A19–A0 AD15–AD0 5 ALE RD LCS, UCS MCS3–MCS0, PCS6–PCS5, PCS3–PCS0 TM Am186 Address Address and Am188 ER Microcontrollers Data Sheet ...
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Switching Characteristics over Commercial and Industrial Operating Ranges PSRAM Read Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Requirements t 1 Data in Setup DVCL ( Data in Hold CLDX General Timing Responses t ...
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Switching Characteristics over Commercial and Industrial Operating Ranges PSRAM Read Cycle (40 MHz and 50 MHz) Parameter No. Symbol Description General Timing Requirements t 1 Data in Setup DVCL ( Data in Hold CLDX General Timing Responses t ...
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... PSRAM Read Cycle Waveforms CLKOUTA A19– AD15–AD0*, AD7–AD0** AO15–AO8 ALE RD 27 LCS 80 84 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM 80 Am186 Address 7 Address Address and Am188 ER Microcontrollers Data Sheet ...
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Switching Characteristics over Commercial and Industrial Operating Ranges PSRAM Write Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Responses Address Valid Delay CLAV t 7 Data Valid Delay CLDV t 8 Status Hold ...
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Switching Characteristics over Commercial and Industrial Operating Ranges PSRAM Write Cycle (40 MHz and 50 MHz) Parameter No. Symbol Description General Timing Responses Address Valid Delay CLAV t 7 Data Valid Delay CLDV t 8 Status Hold ...
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... CLKOUTA A19– AD15–AD0*, Data AD7–AD0** AO15–AO8 ALE WHB*, WLB* WB** 87 LCS 80 84 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM Am186 Address 7 Address Address and Am188 ER Microcontrollers Data Sheet ...
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Switching Characteristics over Commercial and Industrial Operating Ranges PSRAM Refresh Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Responses t 9 ALE Active Delay CHLH t 10 ALE Width LHLL t 11 ALE Inactive Delay CHLL ...
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Switching Characteristics over Commercial and Industrial Operating Ranges PSRAM Refresh Cycle (40 MHz and 50 MHz) Parameter No. Symbol Description General Timing Responses t 9 ALE Active Delay CHLH t 10 ALE Width LHLL t 11 ALE Inactive Delay CHLL ...
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PSRAM Refresh Cycle Waveforms CLKOUTA A19– ALE LCS RFSH 86 Note: * The period t is fixed at three wait states for PSRAM auto refresh only Am186 ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Interrupt Acknowledge Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Requirements t 1 Data in Setup DVCL t 2 Data in Hold CLDX General Timing Responses t 3 ...
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Switching Characteristics over Commercial Operating Ranges Interrupt Acknowledge Cycle (40 MHz and 50 MHz) Parameter No. Symbol Description General Timing Requirements t 1 Data in Setup DVCL t 2 Data in Hold CLDX General Timing Responses t 3 Status Active ...
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... DEN 22 DT/R S2–S0 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only a The status bits become inactive in the state preceding t b The data hold time lasts only until the interrupt acknowledge signal deasserts, even if the interrupt acknowledge transition occurs prior to t (min). CLDX c This parameter applies to an interrupt acknowledge cycle that follows a write cycle ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Software Halt Cycle (25 MHz and 33 MHz) Parameter No. Symbol Description General Timing Responses t 3 Status Active Delay CHSV t 4 Status Inactive Delay CLSH Address Invalid ...
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... Software Halt Cycle Waveforms CLKOUTA 68 A19–A0 5 S6, AD15–AD0*, AD7–AD0**, AO15-AO8** ALE 9 DEN 19 DT/R S2–S0 3 Notes: * Am186ER microcontroller only ** Am188ER microcontroller only TM Am186 Invalid Address Status TM ER and Am188 ER Microcontrollers Data Sheet Invalid Address ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Clock (25 MHz) Parameter No. Symbol Description CLKIN Requirements for Times One Mode ( Period CKIN Low Time (1.5 V) CLCK High Time ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Clock (33 MHz) Parameter No. Symbol Description CLKIN Requirements for Times Four Mode ( Period CKIN Low Time (1.5 V) CLCK High Time ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Clock (40 MHz and 50 MHz) Parameter No. Symbol Description CLKIN Requirements for Times Four Mode ( Period CKIN Low Time (1.5 V) CLCK t 38 ...
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Clock Waveforms—Active Mode CLKOUTA (Divide by one) CLKOUTB Clock Waveforms—Power-Save Mode X2 X1 CLKOUTA (Divide by four) CLKOUTB * CLKOUTB ** Notes: * The CLKOUTB Output Frequency (CBF) bit in the Power Save Control Register (PDCON) is ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Ready and Peripheral Timing (25 MHz and 33 MHz) Parameter No. Symbol Description Ready and Peripheral Timing Requirements t 47 SRDY Transition Setup Time SRYCL t 48 SRDY Transition Hold Time CLSRY ...
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Synchronous Ready Waveforms Case 1 Case 2 Case 3 Case 4 Case 5 CLKOUTA SRDY (Normally Not- Ready System) SRDY (Normally Ready System) Notes: 1. Normally not-ready system. 2. Normally ready system. Asynchronous Ready Waveforms Case 1 Case 2 Case ...
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Peripheral Waveforms CLKOUTA INT4–INT0, NMI, TMRIN1–TMRIN0 DRQ1–DRQ0 TMROUT1– TMROUT0 TM 98 Am186 and Am188 ER Microcontrollers Data Sheet 55 ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Reset and Bus Hold (25 MHz and 33 MHz) Parameter No. Symbol Description Reset and Bus Hold Timing Requirements Address Valid Delay CLAV Address Float Delay ...
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Reset Waveforms X1 RES CLKOUTA Note: RES must be held Low for 1 ms during power-up to ensure proper device initialization. Activating the PLL will require achieve a stable clock. Signals Related to Reset Waveforms RES CLKOUTA ...
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Bus Hold Waveforms—Entering CLKOUTA 58 HOLD HLDA AD15–AD0, DEN A19–A0, S6, RD, WR, BHE, DT/R, S2-S0 WHB, WLB Bus Hold Waveforms—Leaving Case 1 Case 2 CLKOUTA HOLD HLDA AD15–AD0, DEN A19–A0, S6, RD, WR, BHE, DT/R, S2–S0 WHB, WLB TM ...
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Switching Characteristics over Commercial and Industrial Operating Ranges Synchronous Serial Interface (SSI) (25 MHz and 33 MHz) Parameter No. Symbol Description Synchronous Serial Port Timing Requirements t 75 Data Valid to SCLK High DVSH t 77 SCLK High to SPI ...
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Synchronous Serial Interface (SSI) Waveforms CLKOUTA SDEN1 or SDEN0 SCLK SDATA (RX) SDATA (TX) Note: SDATA is bidirectional and used for either transmit (TX) or receive (RX). Timing is shown separately for each case. TM Am186 ...
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TQFP PHYSICAL DIMENSIONS PQL 100, Trimmed and Formed Thin Quad Flat Pack 100 1 1.35 1.45 0.17 0.27 1.00 REF. Notes: 1. All measurements are in millimeters, unless otherwise noted. 2. Not to scale; for reference only. TM 104 Am186 ...
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PQFP PHYSICAL DIMENSIONS PQR 100, Trimmed and Formed Plastic Quad Flat Pack Pin 100 12.35 REF Pin 1 I.D. Pin 30 2.70 2.90 0.25 MIN Notes: 1. All measurements are in millimeters, unless otherwise noted. 2. Not to scale; for ...
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TM 106 Am186 TM ER and Am188 ER Microcontrollers Data Sheet ...
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... Am186ER and 80C186 microcontrollers, 15 crystal selecting, 45 crystal-driven clock source, 45 customer support, 13 documentation and literature, 13 hotline and web, 13 literature ordering, 13 third-party development support products, 13 ...
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... D DC characteristics, 60 demonstration board products, 13 DEN/PIO5, 31 description, 1 functional, 40 direct memory access, 54 DMA Am186ER maximum transfer rates, 55 asynchronous serial port transfers, 55 channel control registers, 55–56 operation, 55 priority, 55–56 transfers through serial port, 56 unit block diagram, 56 documentation See customer support. DRQ1–DRQ0, 32 DT/R/PIO4, 32 ...
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... RFSH2/ADEN, 35 RXD/PIO28, 35 S0/SREN, 37 S1/IMDIS, 37 S2, 35 S6/CLKSEL1/PIO29, 37 SCLK/PIO20, 37 SDATA/PIO21, 37 SDEN0/PIO22, 37 SDEN1/PIO23, 37 SRDY/PIO6, 38 TMRIN0/PIO11, 38 TMRIN1/PIO0, 38 TMROUT0/PIO10, 38 TMROUT1/PIO1, 38 TXD/PIO27, 38 UCS/ONCE1, 38 used by emulators, 30 UZI/CLKSEL2/PIO26, 38 VCC (Am188ER microcontroller only), 39 WHB, 39 WLB (Am186ER microcontroller only), 39 WR, 39 X1, 39 X2, 39 PIO31–PIO0, 35 plastic quad flat pack, 105 Index-3 ...
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... PLL, 44 power consumption calculation, 62 power savings, 59 power-save mode clock waveforms, 95 power-save operation, 48 PQFP connection diagram and pinouts Am186ER, 22 Am188ER, 25 PQFP physical dimensions, 105 PQFP pin assignments Am186ER sorted by pin name, 24 sorted by pin number, 23 Am188ER sorted by pin name, 27 sorted by pin number, 26 programmable I/O (PIO) pins, 57 ...
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... SSI, 103 synchronous ready, 97 synchronous serial interface, 103 write cycle (Am188ER microcontroller only), 39 WHB, 39 WLB (Am186ER microcontroller only), 39 world wide web support, 13 WR, 39 write cycle waveforms, 75 www home page, 13 support X1, 39 ...
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Trademarks 2000 Advanced Micro Devices, Inc. All rights reserved. AMD, the AMD logo, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Am386, Am5 86, and Am486 are registered trademarks, and Am186, Am188, E86, Élan, and AMD-K6 are trademarks ...