h8s2277 Renesas Electronics Corporation., h8s2277 Datasheet - Page 295

• Manufacturer Part Number: h8s2277
• Description: Hitachi Single-chip Microcomputer H8s/2276 Series
• Manufacturer: Renesas Electronics Corporation.

10.2.4
The TIER registers are 8-bit registers that control enabling or disabling of interrupt requests for
each channel. The TPU has three TIER registers, one for each channel. The TIER registers are
initialized to H'40 by a reset, and in hardware standby mode.
Bit 7—A/D Conversion Start Request Enable (TTGE): Enables or disables generation of A/D
conversion start requests by TGRA input capture/compare match.
Bit 7
TTGE
0
1
Bit 6—Reserved: Read-only bit, always read as 1.
Bit 5—Underflow Interrupt Enable (TCIEU): Enables or disables interrupt requests (TCIU) by
the TCFU flag when the TCFU flag in TSR is set to 1 in channels 1 and 2.
In channel 0, bit 5 is reserved. It is always read as 0 and cannot be modified.
Bit 5
TCIEU
0
1
Channel 0: TIER0
Bit
Initial value
R/W
Channel 1: TIER1
Channel 2: TIER2
Bit
Initial value
R/W
Timer Interrupt Enable Register (TIER)
:
:
:
:
:
:
Description
A/D conversion start request generation disabled
A/D conversion start request generation enabled
Description
Interrupt requests (TCIU) by TCFU disabled
Interrupt requests (TCIU) by TCFU enabled
TTGE
TTGE
R/W
R/W
7
0
7
0
—
—
—
—
6
1
6
1
TCIEU
R/W
—
—
5
0
5
0
TCIEV
TCIEV
R/W
R/W
4
0
4
0
TGIED
R/W
—
—
3
0
3
0
TGIEC
R/W
—
—
2
0
2
0
TGIEB
TGIEB
R/W
R/W
1
0
1
0
(Initial value)
(Initial value)
TGIEA
TGIEA
R/W
R/W
0
0
0
0
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