h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 435
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
- Current page: 435 of 1061
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14.3
14.3.1
To use the WDT as a watchdog timer, set the WT/IT and TME bits in TCSR to 1. Software must
prevent TCNT overflows by rewriting the TCNT value (normally by writing H'00) before
overflow occurs. This ensures that TCNT does not overflow while the system is operating
normally. If TCNT overflows without being rewritten because of a system crash or other error, an
internal reset or NMI interrupt request is generated.
When the RST/NMI bit is set to 1, the chip is reset for 518 system clock periods (518 ) by a
counter overflow. This is illustrated in figure 14.3.
When the RST/NMI bit cleared to 0, an NMI interrupt request is generated by a counter overflow.
An internal reset request from the watchdog timer and reset input from the RES pin are handled
via the same vector. The reset source can be identified from the value of the XRST bit in SYSCR.
If a reset caused by an input signal from the RES pin and a reset caused by WDT overflow occur
simultaneously, the RES pin reset has priority, and the XRST bit in SYSCR is set to 1.
An NMI interrupt request from the watchdog timer and an interrupt request from the NMI pin are
handled via the same vector. Simultaneous handling of a watchdog timer NMI interrupt request
and an NMI pin interrupt request must therefore be avoided.
Operation
Watchdog Timer Operation
Rev. 4.00 Jun 06, 2006 page 381 of 1004
Section 14 Watchdog Timer (WDT)
REJ09B0301-0400
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