h8s-2138 Renesas Electronics Corporation., h8s-2138 Datasheet - Page 220
h8s-2138
Manufacturer Part Number
h8s-2138
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2138.pdf
(1061 pages)
- Current page: 220 of 1061
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Section 7 Data Transfer Controller [H8S/2138 Group]
7.2.6
Bit
Initial value
Read/Write
CRB is a 16-bit register that designates the number of times data is to be transferred by the DTC in
block transfer mode. It functions as a 16-bit transfer counter (1 to 65,536) that is decremented by 1
every time data is transferred, and transfer ends when the count reaches H'0000.
7.2.7
The DTC enable registers comprise five 8-bit readable/writable registers, DTCERA to DTCERE,
with bits corresponding to the interrupt sources that can activate the DTC. These bits enable or
disable DTC service for the corresponding interrupt sources.
The DTC enable registers are initialized to H'00 by a reset and in hardware standby mode.
Bit n—DTC Activation Enable (DTCEn)
Bit n
DTCEn
0
1
Rev. 4.00 Jun 06, 2006 page 166 of 1004
REJ09B0301-0400
Bit
Initial value
Read/Write
DTC Transfer Count Register B (CRB)
DTC Enable Registers (DTCER)
Description
DTC activation by interrupt is disabled
[Clearing conditions]
DTC activation by interrupt is enabled
[Holding condition]
When the DISEL bit is 0 and the specified number of transfers have not ended
Unde-
fined
15
—
When data transfer ends with the DISEL bit set to 1
When the specified number of transfers end
DTCE7
Unde-
R/W
fined
14
—
7
0
Unde-
fined
13
—
DTCE6
R/W
Unde-
fined
6
0
12
—
Unde-
fined
11
—
DTCE5
R/W
Unde-
5
0
fined
10
—
Unde-
fined
—
9
DTCE4
R/W
4
0
Unde-
fined
—
8
Unde-
fined
—
DTCE3
7
R/W
3
0
Unde-
fined
—
6
Unde-
fined
DTCE2
—
5
R/W
2
0
Unde-
fined
—
4
Unde-
DTCE1
fined
—
R/W
3
1
0
Unde-
fined
—
2
(Initial value)
DTCE0
(n = 7 to 0)
Unde-
fined
R/W
—
1
0
0
Unde-
fined
—
0
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