PLL130-07 PhaseLink (PLL), PLL130-07 Datasheet - Page 3

• Manufacturer Part Number: PLL130-07
• Description: Output Level Converter Buffer , 1 Out, Translator to STD Drive CMOS, < 200MHz
• Manufacturer: PhaseLink (PLL)

3. CMOS Output Electrical Specifications
* Note: High Drive CMOS is selectable through DRIV_SEL selector input on pin 13.
4. CMOS Switching Characteristics
* Note: High Drive CMOS is selectable through DRIV_SEL selector input on pin 13.
47745 Fremont Blvd., Fremont, California 94538 TEL [phone] FAX [phone]
Output High Voltage
Output Low Voltage
Output High Voltage at CMOS
level
Output drive current
Output Clock Rise/Fall Time
Output Clock Rise/Fall Time
(High Drive*)
PARAMETERS
PARAMETERS
High Speed Translator Buffer to CMOS (Selectable Drive)
SYMBOL
SYMBOL
V
V
V
OHC
OH
OL
I
I
I
At TTL level (High drive*)
At TTL level (Standard drive)
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
0.8V ~ 2.0V with 10 pF load
0.3V ~ 3.0V with 15 pF load
OH
LO
OH
= 12mA
= -12mA
= -4mA
CONDITIONS
CONDITIONS
V
Preliminary
DD
MIN.
MIN.
2.4
36
12
– 0.4
TYP.
TYP.
1.15
3.7
0.5
1.5
PLL130-07
51
17
MAX.
MAX.
Rev 10/29/02 Page 3
0.4
UNITS
UNITS
mA
mA
ns
V
V
V