DS91C176_08 NSC [National Semiconductor], DS91C176_08 Datasheet

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DS91C176_08

Manufacturer Part Number
DS91C176_08
Description
100 MHz Single Channel M-LVDS Transceivers
Manufacturer
NSC [National Semiconductor]
Datasheet
© 2008 National Semiconductor Corporation
DS91D176/DS91C176
100 MHz Single Channel M-LVDS Transceivers
General Description
The DS91C176 and DS91D176 are 100 MHz single channel
M-LVDS (Multipoint Low Voltage Differential Signaling)
transceivers designed for applications that utilize multipoint
networks (e.g. clock distribution in ATCA and uTCA based
systems). M-LVDS is a new bus interface standard (TIA/
EIA-899) optimized for multidrop networks. Controlled edge
rates, tight input receiver thresholds and increased drive
strength are sone of the key enhancments that make M-LVDS
devices an ideal choice for distributing signals via multipoint
networks.
The DS91C176/DS91D176 are half-duplex transceivers that
accept LVTTL/LVCMOS signals at the driver inputs and con-
vert them to differential M-LVDS signals. The receiver inputs
accept low voltage differential signals (LVDS, B-LVDS, M-
LVDS, LV-PECL and CML) and convert them to 3V LVCMOS
Typical Application in an ATCA Clock Distribution Network
200246
signals. The DS91D176 has a M-LVDS type 1 receiver input
with no offset. The DS91C176 has an M-LVDS type 2 receiver
which enable failsafe functionality.
Features
DC to 100+ MHz / 200+ Mbps low power, low EMI
operation
Optimal for ATCA, uTCA clock distribution networks
Meets or exceeds TIA/EIA-899 M-LVDS Standard
Wide Input Common Mode Voltage for Increased Noise
Immunity
DS91D176 has type 1 receiver input
DS91C176 has type 2 receiver with fail-safe
Industrial temperature range
Space saving SOIC-8 package
February 29, 2008
20024630
www.national.com

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DS91C176_08 Summary of contents

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DS91D176/DS91C176 100 MHz Single Channel M-LVDS Transceivers General Description The DS91C176 and DS91D176 are 100 MHz single channel M-LVDS (Multipoint Low Voltage Differential Signaling) transceivers designed for applications that utilize multipoint networks (e.g. clock distribution in ATCA and uTCA based ...

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Connection and Logic Diagram Ordering Information Order Number Receiver Input DS91D176TMA DS91C176TMA M-LVDS Receiver Types The EIA/TIA-899 M-LVDS standard specifies two different types of receiver input stages. A type 1 receiver has a con- ventional threshold that is centered at ...

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Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage Control Input Voltages Driver Input Voltage Driver Output Voltages Receiver Input Voltages Receiver Output Voltage ...

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Symbol Parameter M-LVDS Bus (Input and Output) Pins I Transceiver input/output current A I Transceiver input/output current B I Transceiver input/output differential current ( Transceiver input/output power-off current A(OFF) I Transceiver input/output power-off current B(OFF) I Transceiver input/output ...

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Switching Characteristics Over recommended operating supply and temperature ranges unless otherwise specified. (Notes 3, 8) Symbol Parameter DRIVER AC SPECIFICATION t Differential Propagation Delay Low to High PLH t Differential Propagation Delay High to Low PHL Pulse ...

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Test Circuits and Waveforms www.national.com FIGURE 2. Differential Driver Test Circuit FIGURE 3. Differential Driver Waveforms FIGURE 4. Differential Driver Full Load Test Circuit FIGURE 5. Differential Driver DC Open Test Circuit 6 20024614 20024624 20024622 20024612 ...

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FIGURE 6. Differential Driver Short-Circuit Test Circuit FIGURE 7. Driver Propagation Delay and Transition Time Test Circuit FIGURE 8. Driver Propagation Delays and Transition Time Waveforms 7 20024625 20024616 20024618 www.national.com ...

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FIGURE 11. Receiver Propagation Delay and Transition Time Test Circuit www.national.com FIGURE 9. Driver TRI-STATE Delay Test Circuit FIGURE 10. Driver TRI-STATE Delay Waveforms 8 20024619 20024621 20024615 ...

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FIGURE 12. Type 1 Receiver Propagation Delay and Transition Time Waveforms FIGURE 13. Type 2 Receiver Propagation Delay and Transition Time Waveforms FIGURE 14. Receiver TRI-STATE Delay Test Circuit 20024617 20024623 20024613 9 www.national.com ...

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FIGURE 15. Receiver TRI-STATE Delay Waveforms 10 20024620 ...

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Function Tables X — Don't care condition Z — High impedance state DS91D176 Receiving Inputs − B ≥ 0.8V 0.8V +0.05V ≤ 0.8V 0.8V −0.05V 0.8V 0.8V 0V 2.0V 0. — Don't care condition Z ...

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Pin Descriptions Pin No. Name GND Typical Performance Supply Current vs. Frequency Supply Current measured using a clock pattern with driver terminated to 50ohms . V = 3.3V, T ...

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Physical Dimensions inches (millimeters) unless otherwise noted Order Number DS91D176TMA, DS91C176TMA See NS package Number M08A 13 www.national.com ...

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