eds1232aase Elpida Memory, Inc., eds1232aase Datasheet - Page 14

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eds1232aase

Manufacturer Part Number
eds1232aase
Description
128m Bits Sdram
Manufacturer
Elpida Memory, Inc.
Datasheet

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Self refresh entry command (/CS, /RAS, /CAS, CKE = Low, /WE = High)
After the command execution, self refresh operation continues while CKE remains low. When CKE goes high, the
Synchronous DRAM exits the self refresh mode. During self refresh mode, refresh interval and refresh operation are
performed internally, so there is no need for external control. Before executing self refresh, all banks must be
precharged.
Burst stop command (/CS = /WE = Low, /RAS, /CAS = High)
This command can stop the current burst operation.
No operation (/CS = Low, /RAS, /CAS, /WE = High)
This command is not an execution command. No operations begin or terminate by this command.
Data Sheet E0350E31 (Ver. 3.1)
Burst Stop Command in Full Page Mode
Self Refresh Entry Command
(Bank select)
(Bank select)
(Bank select)
BA0, BA1
BA0, BA1
BA0, BA1
/RAS
/CAS
/RAS
/CAS
/RAS
/CAS
CKE
CKE
CKE
CLK
CLK
CLK
/WE
/WE
/WE
A10
Add
A10
Add
A10
Add
/CS
/CS
/CS
No Operation
H
14
H
EDS1232AASE

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