ST16C654 EXAR [Exar Corporation], ST16C654 Datasheet - Page 16

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ST16C654

Manufacturer Part Number
ST16C654
Description
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
Manufacturer
EXAR [Exar Corporation]
Datasheet

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Automatic RTS hardware flow control is used to prevent data overrun to the local receiver FIFO. The RTS#
output is used to request remote unit to suspend/resume data transmission. The auto RTS flow control features
is enabled to fit specific application requirement (see
If needed, the RTS interrupt can be enabled through IER bit-6 (after setting EFR bit-4). The UART issues an
interrupt when the RTS# pin makes a transition from low to high: ISR bit-5 will be set to logic 1.
Automatic CTS flow control is used to prevent data overrun to the remote receiver FIFO. The CTS# input is
monitored to suspend/restart the local transmitter. The auto CTS flow control feature is selected to fit specific
application requirement (see Figure 11):
If needed, the CTS interrupt can be enabled through IER bit-7 (after setting EFR bit-4). The UART issues an
interrupt when the CTS# pin is de-asserted (logic 1): ISR bit-5 will be set to 1, and UART will suspend
transmission as soon as the stop bit of the character in process is shifted out. Transmission is resumed after
the CTS# input is re-asserted (logic 0), indicating more data may be sent.
F
2.11
2.12
IGURE
Enable auto RTS flow control using EFR bit-6.
The auto RTS function must be started by asserting RTS# output pin (MCR bit-1 to logic 1 after it is enabled).
Enable auto CTS flow control using EFR bit-7.
Receive Data
Byte and Errors
10. R
Auto RTS Hardware Flow Control
Auto CTS Flow Control
64 bytes by 11-bit
16X Clock
ECEIVER
wide
FIFO
O
PERATION IN
Receive Data Shift
Register (RSR)
Data FIFO
Receive
Receive
FIFO
Data
AND
A
UTO
Validation
Data falls to
Data Bit
Data fills to
Trigger=16
Exam ple
- RX FIFO trigger level selected at 16 bytes
FIFO
56
RTS F
8
Figure
16
:
2.97V TO 5.5V QUAD UART WITH 64-BYTE FIFO
LOW
11):
RTS# re-asserts when data falls below the flow
control trigger level to restart rem ote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RTS# de-asserts when data fills above the flow
control trigger level to suspend remote transmitter.
Enable by EFR bit-6=1, MCR bit-1.
RHR Interrupt (ISR bit-2) programm ed for
desired FIFO trigger level.
FIFO is Enabled by FCR bit-0=1
C
ONTROL
M
ODE
Receive Data Characters
ST16C654/654D
5 ; ) , ) 2 
REV. 5.0.0

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